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Design Languages >> Verilog-AMS >> modeling an amplifier in verilogAMS
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Message started by adecve on Jan 23^rd, 2009, 10:16am

Title: modeling an amplifier in verilogAMS
Post by adecve on Jan 23^rd, 2009, 10:16am

Hi,
there are different functions like fcube, ftanh, tanh etc that can be used to model an amplifier. Can somebody tell me if there is any specific one that is preferred over the other functions to model an amp or can i use any one of them and just change the gain to suit the requirements?

thanks.

Title: Re: modeling an amplifier in verilogAMS
Post by jbdavid on Jan 27^th, 2009, 3:17pm

It might depend on the analyses you need to run.
generally one needs to support both small and large signal response.

for functional purposes modeling A = gm*Rout
is usually sufficient, and allows the gm to be computed from the basics, like Vcm(im), and Ibias.
Your mileage may vary.
jbd

Title: Re: modeling an amplifier in verilogAMS
Post by RFICDUDE on Jan 29^th, 2009, 7:27pm

If you just want a generic limiting amplifier function you could use

L*tanh(g*x/L)

L is the maximum output level
g is the gain

If you want to adjust the sharpness of the limiter (sharper limiting is more linear) you could use the following adjustable model

g*x/[1+(g*abs(x)/L)^s)]^(1/s)

s is the sharpness factor

You could also use analytical functions for real amplifiers such as bipolar and cmos differential pairs (found in most circuits text books).

If you need an accurate behavioral model then you will need to spend time figuring out which behaviors you need and cobble together good models for those characteristics.