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https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> About BSIM3v3 small-signal parameters https://designers-guide.org/forum/YaBB.pl?num=1234784202 Message started by DoYouLinux on Feb 16th, 2009, 3:36am |
Title: About BSIM3v3 small-signal parameters Post by DoYouLinux on Feb 16th, 2009, 3:36am Dear all, I have a question to ask about BSIM model. Since now I am using a BSIM3.3 0.18-um CMOS model in my work (Cadence, Spectre) and I am wondering about how to figure out the total parasitic capacitances of a transistor. In PSPICE, after I ran a simulation and click on the Probe window to see the output file, I can see a list of small-signal parameters saying that, for example, Cgs = 10 fF (for intrinsic), Cgsov = 20 fF (for overlap capacitance), etc. However, for BSIM3.3 and for Spectre simulator, I receive a set of small-signal parameters after running a simulation, for example, as shown in the attached picture. For these parameters, for the capacitances, I don't know how to calculate the total intrinsic and extrinsic capacitances since they are separated into several capacitances. Would you mind to explain me a little bit about this and in case that I would like study more, is it possible to recommend me some books or some documents explaining about this ? Thank you very much, DYL :) |
Title: Re: About BSIM3v3 small-signal parameters Post by Andrew Beckett on Feb 16th, 2009, 4:10am This has come up numerous times before. I suggest trying the "Search" facility of the forum. I just did that and found: http://www.designers-guide.org/Forum/YaBB.pl?num=1087411058/1#1 http://www.designers-guide.org/Forum/YaBB.pl?num=1077279932/1#1 http://www.designers-guide.org/Forum/YaBB.pl?num=1053460340/1#1 there are others - these are just some of my own responses... Regards, Andrew. |
Title: Re: About BSIM3v3 small-signal parameters Post by DoYouLinux on Feb 16th, 2009, 4:14am Oh, Thank you very much, Andrew. Yes, you were right, I forgot searching in the forum before. DYL |
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