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Design Languages >> Verilog-AMS >> separating out capacitive currents in transistors
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Message started by madsoup on Feb 18^th, 2009, 6:22pm

Title: separating out capacitive currents in transistors
Post by madsoup on Feb 18^th, 2009, 6:22pm

i'm trying to directly measure in spice where the currents entering the terminals of a transistor flow. specifically, i want to be able to differentiate between currents charging capacitances and other.

the path i'm heading down is breaking apart one of the verilog-a transistor models, making a standalone verilog module for each of its current sources and then wiring them up in a schematic. this way i can descend into the transistor and probe internal branches.

i've been eyeing the models at SIMUCAD, and i also have the "official" EKV2.6 model from the EKV guys.

good idea, bad idea, general thoughts?

thanks

Title: Re: separating out capacitive currents in transistors
Post by Geoffrey_Coram on Feb 24^th, 2009, 6:13am

Many of the transistor models will break out op-pt info such as the channel or diode currents; subtracting these from the total terminal current might give you what you want.

Your approach might work; it will almost certainly be inefficient because certain calculations are used in several internal equations.

Title: Re: separating out capacitive currents in transistors
Post by madsoup on Feb 28^th, 2009, 10:09pm

actually, something like that would work just fine for what i want.

is there a straight forward way to have spice (i mostly use hspice, and spectre, though i am not opposed to other simulators) spit out sorta quasi-steady-state voltages and currents from a time simulation?

to be more specific, what i'd want would be the equivalent functionality of taking take all node voltages as a function of time from a transient simulation. then use these in a parametric dc sweep to get the currents.

this would be even better, as i wouldn't have to limit myself to only veriloga models.

Title: Re: separating out capacitive currents in transistors
Post by Ken Kundert on Mar 1^st, 2009, 12:10am

With spectre, add "save M1:displacement" to your netlist, where M1 should be replaced with the name of the component that you want the capacitive currents for, and it will save the displacement (capacitive) currents to the rawfile. They you will need to need to bring up the results browser and manually plot these currents.

-Ken

Title: Re: separating out capacitive currents in transistors
Post by madsoup on Mar 2^nd, 2009, 12:19am

excellent, this is exactly what i was looking for.

thank you guys so much.