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Simulators >> Circuit Simulators >> inl dnl simulation of adc
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Message started by microtron on Feb 18^th, 2009, 11:57pm

Title: inl dnl simulation of adc
Post by microtron on Feb 18^th, 2009, 11:57pm

Hi teachers here,

I am a beginner in vlsi design. I am designing a 6 flash bit adc in cadence. I have completed the schematic only. I want to perform simulation for inl dnl etc. How can i write the digital output of my adc to a file. Is matlab required. Pls help me from the very beginning as i am a beginner. The output voltage levels of my adc rom are as follows:

0--- .4 volts
1--- 1.4 volts

Title: Re: inl dnl simulation of adc
Post by Andrew Beckett on Feb 20^th, 2009, 11:37pm

Are you planning to simulate it in spectre, or AMS Designer (mixed-signal)?

If spectre, then one way would be to simulate in ADE, and then plot the outputs of your ADE in Wavescan/ViVA (depending on the version you're using). Then select the output waveforms in the graph and hit the "a2d" icon. On the resulting form, you can specify the thresholds for low and high, and when you OK this, it will generate digital traces for these signals. You can then select all of these in the waveform window, and hit the "table" icon. OK the resulting form, and you'll see the 1/0/x info for each signal versus time.

You can then do a File->Save As CSV if you want to get it into a comma-separated-value file.

It wasn't clear what you wanted to do with the data, but hopefully this will give you a few hints?

Regards,

Andrew.

Title: Re: inl dnl simulation of adc
Post by microtron on Feb 21^st, 2009, 7:49pm

Respected Andrew Sir,

Thank you very much for your help. I am designing in Spectre. I want to find inl dnl of my 6 bit adc. Should i export to matlab. Can you suggest me a simple yet efficient to evaluate inl dnl. I want to use histogram method with a ramp input. Can u provide me any matlab program with detailed information like:

1. Frequency of my input signal.
2. ADC clock frequency.
3. No. of samples etc.

which would lead to optimum evaluation of inl dnl

Actually i am proposing a new novel ROM architecture. I want to show that my ROM will provide better inl dnl compared to binary coded ROM.
So, i want to find inl dnl parameters.

Title: Re: inl dnl simulation of adc
Post by Andrew Beckett on Feb 22^nd, 2009, 12:00pm

I'm afraid I don't have any matlab code to do this.

Regards,

Andrew.

Title: Re: inl dnl simulation of adc
Post by Andrew Beckett on Feb 22^nd, 2009, 12:02pm

By the way, if you really want to do this in matlab, there is also the "spectre toolbox" in the MMSIM installations which is a toolbox for Matlab which can read spectre/ultrasim/AMS simulation results directly into Matlab.

Regards,

Andrew.

Title: Re: inl dnl simulation of adc
Post by microtron on Feb 22^nd, 2009, 5:57pm

Respected Sir,

Can u suggest me a mwthod of finding inl dnl without using matlab..... I mean with cadence itself.

Title: Re: inl dnl simulation of adc
Post by packiaraj on Mar 5^th, 2009, 9:31pm

You could use "adc_inl_8bit" & "adc_dnl_8bit" VerilogA or AHDL models available in "ahdlLib" library of Cadence-Spectre. Instantiate these models in your schematic. You may modify these models according to your requirements [no of bits, voltage levels etc].

Regards,
Packiaraj.V.