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Simulators >> Circuit Simulators >> DUSpice, subcircuits
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Message started by mm1234 on Mar 2^nd, 2009, 2:51pm

Title: DUSpice, subcircuits
Post by mm1234 on Mar 2^nd, 2009, 2:51pm

Hi,
i tried to simulate the following simple xor-gate with DUspice 3f5.
Here´s the netlist:

xor
.include ntyp_ngspice.inc
.include ptyp_ngspice.inc
VDD 2 0 3
vea ext2 0 3
veb ext3 0 3
.subckt xor bin ain zout 1
M1 int16 bin 0 0 nmos w=1u l=0.35u
M2 int16 bin 1 1 pmos w=3u l=0.35u
M3 int12 ain 0 0 nmos w=1u l=0.35u
M4 int12 ain 1 1 pmos w=3u l=0.35u
M5 int11 bin 0 0 nmos w=1u l=0.35u
M6 int10 int16 0 0 nmos w=1u l=0.35u
M7 zout ain int11 0 nmos w=1u l=0.35u
M8 zout int12 int10 0 nmos w=1u l=0.35u
M9 zout int16 int16 1 pmos w=3u l=0.35u
M10 zout int12 int16 1 pmos w=3u l=0.35u
M11 int16 bin 1 1 pmos w=3u l=0.35u
M12 int16 ain 1 1 pmos w=3u l=0.35u
.ends
X1 ext3 ext2 ext1 2 xor
.options itl4=20 reltol=0.001 abstol=1E-12 temp=27
.tran 0.1ns 200ns
.plot tran
.end

The xor is realized in a subcircuit, but it doesn´t work. There is no error message given by Spice, but the results of the simulation are false (output zout is always 0, independent from the inputs bin and ain)

Following netlist shows exactly the same simple xor- circuit, just realized without using subcircuits, it works absolutely correct.

*SPICE circuit <Page 3> from XCircuit v3.6 rev 115
.include ntyp_ngspice.inc
.include ptyp_ngspice.inc
VDD 1 0 3
vea ain 0 3
veb bin 0 0
M1 int16 bin 0 0 nmos w=1u l=0.35u
M2 int16 bin 1 1 pmos W=3u L=0.35u
M3 int12 ain 0 0 nmos w=1u l=0.35u
M4 int12 ain 1 1 pmos W=3u L=0.35u
M5 int11 bin 0 0 nmos w=1u l=0.35u
M6 int10 int16 0 0 nmos w=1u l=0.35u
M7 zout ain int11 0 nmos w=1u l=0.35u
M8 zout int12 int10 0 nmos w=1u l=0.35u
M9 zout int16 int16 1 pmos W=3u L=0.35u
M10 zout int12 int16 1 pmos W=3u L=0.35u
M11 int16 bin 1 1 pmos W=3u L=0.35u
M12 int16 ain 1 1 pmos W=3u L=0.35u
.options itl4=20 reltol=0.001 abstol=1E-12 temp=27
.tran 0.1ns 200ns
.plot tran
.end

What´s wrong ? I don´t understand the problem.

Thanks :)

Title: Re: DUSpice, subcircuits
Post by Geoffrey_Coram on Mar 3^rd, 2009, 6:47am

I don't know DUspice ... is it possible that the "0" inside the subcircuit isn't connected to the global 0? You could change the subckt definition to add a terminal for 0.

Title: Re: DUSpice, subcircuits
Post by mm1234 on Mar 7^th, 2009, 9:28am

Hello,
thanks for your help.
But meanwhile I have seen, that I have been wrong. There was an general problem in the CMOS circuit. Both versions (with subcircuit and without subc) don´t work correctly.
When the Input 1 is High and Input 2 is low, the output is high (correct). But vice versa, when Input 1 is low and Input 2 is high, the output is low.
Unfortunately, when I simulated the XOR, i used the first (correct) combination for the circuit without subcircuit, and the second (wrong) combination for the subcircuit version…….. and so I thought the problem was caused by an mistake in the realization with subcircuit.
I´m sorry…….

Greetings