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Design >> Mixed-Signal Design >> can i use I/O Mos to design the complete chip? (for UMC 0.13)
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Message started by nus_lin on Mar 10th, 2009, 3:00am

Title: can i use I/O Mos to design the complete chip? (for UMC 0.13)
Post by nus_lin on Mar 10th, 2009, 3:00am

hi, is there anybody who is familiar with UMC cmos 0.13? i have to design a sensor readout circuit based on this technology. the power supply voltage is fixed to 3.3V. it looks that the I/O MOSFET fits the voltage requirement. but what i am not sure is that, is it allowed to design the complete chip, including the core parts with such I/O MOSFETS?

thanks.

Title: Re: can i use I/O Mos to design the complete chip? (for UMC 0.13)
Post by Berti on Mar 11th, 2009, 3:27am

I don't know UMC 0.13um and its design rules. But in general I think it is quite common to use thick-oxide transistors only for the analog circuitry. I don't think that this is prevented by design-rules. But I think you should find that rule in you DRM, if there is any.

Cheers

Title: Re: can i use I/O Mos to design the complete chip? (for UMC 0.13)
Post by Terence on Mar 11th, 2009, 4:15am

It is very general to use I/O MOS for analog circuit with Vdd=3.3V. I think it is no problem at all.

Title: Re: can i use I/O Mos to design the complete chip? (for UMC 0.13)
Post by nus_lin on Mar 11th, 2009, 6:54am

thank you, berti, thank you, terence.

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