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Design Languages >> Verilog-AMS >> Ternary operator (that is, ?:) versus if/else advantage?
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Message started by Peruzzi on Mar 12^th, 2009, 12:18pm

Title: Ternary operator (that is, ?:) versus if/else advantage?
Post by Peruzzi on Mar 12^th, 2009, 12:18pm

For behavioral modeling as opposed to RTL code for synthesis, I wonder if there's a simulation execution speed advantage to using the ternary operator rather than the more readable if/else construct.

Here's an example of a digital mux, but my question applies to both digital and analog behavioral models:

// If/Else approach

reg t;

always @ (a or b or select)
if (select)
t = a;
else
t = b;

// Ternary approach:
wire t = (select ? a : b);

If the goal were digital synthesis, there's a difference: if/else results in a register with multiplexed input. Ternary results in just the mux, but that's not the point.

The two approaches give identical behavioral results.

My instinct tells me the ternary approach takes the same number of cycles to execute as the if/else code, even though it looks more compact and clever, but does anybody know if this is in fact true?

I tend to use the if/else approach to make the code more readable to others (as well as to myself months later). But I would change to the ternary approach if it offered even a small speed advantage.

Thanks,

Bob P.

Title: Re: Ternary operator (that is, ?:) versus if/else advantage?
Post by boe on Mar 12^th, 2009, 1:21pm

Peruzzi wrote on Mar 12^th, 2009, 12:18pm:

... If the goal were digital synthesis, there's a difference: if/else results in a register with multiplexed input. Ternary results in just the mux, but that's not the point. ...

Your code fragments should both synthesize to just a MUX.

Quote:

... My instinct tells me the ternary approach takes the same number of cycles to execute as the if/else code, even though it looks more compact and clever, but does anybody know if this is in fact true? ...

It might depend on the simulator (and, maybe even its version)...
BOE

Title: Re: Ternary operator (that is, ?:) versus if/else advantage?
Post by jbdavid on Mar 12^th, 2009, 1:42pm

I find something described on one line is EASIER to read, than something that takes 4 or 5 lines..

A master coder could probably figure out a way to measure the speed difference between simulators.. but I suspect its LOW on the list of ways to speed up model execution. Profilers can help you identify where your model is spending its time.
It also may Vary between different vendors.

I would NOT suggest forbiding the use of ternary operators in behavioral modelng.. as to RTL, idk.

Jonathan

Title: Re: Ternary operator (that is, ?:) versus if/else advantage?
Post by Peruzzi on Mar 13^th, 2009, 11:28am

BOE, Jonathan,

Both interesting responses and useful information. I guess readability is in the eye of...

Thanks for responding.

Bob P.