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Design Languages >> Verilog-AMS >> AC analysis in verilog-ams
https://designers-guide.org/forum/YaBB.pl?num=1237145096

Message started by Alex83 on Mar 15th, 2009, 12:24pm

Title: AC analysis in verilog-ams
Post by Alex83 on Mar 15th, 2009, 12:24pm

Hi All,
I am new to this forum and also to Verilog-AMS.
I would like to use some testbenches made of varilog-ams blocks for AC analysis especially for testing stability and bandwidth.
Can someone tell me if this is possible? If yes how is possible if every blocks is made of code insted of R and C? Who generates the poles and the zeros?
Many thanks

Title: Re: AC analysis in verilog-ams
Post by Geoffrey_Coram on Mar 16th, 2009, 5:33am

Yes, it's possible -- if the Verilog-AMS modules are written correctly.

You can write a resistor as I(a,b) <+ V(a,b) / R; and a capacitor as I(t,b) <+ ddt(C * V(a,b));

You might want to read up on how Spice does an ac analysis (see the DG to Spice and Spectre).  The idea is that Spice linearizes the entire circuit around the operating point, so you have to have your AMS modules written so that their derivatives (the linearization) are correct at any operating point.

Title: Re: AC analysis in verilog-ams
Post by sand_dolphin2 on Oct 26th, 2009, 4:30pm


Geoffrey_Coram wrote on Mar 16th, 2009, 5:33am:
Yes, it's possible -- if the Verilog-AMS modules are written correctly.


sorry for continue discussing about this thread.
i want to make AC analysis bellow case w/t verilog-HDL and Verilog-AMS.

  input analog V(Vin) => AD comparator(verilog-AMS)
   => LOGIC(verilog-HDL)
   => DA comparator(verilog-AMS) => output analog V(Vout)

I want to make AC analysis btw Vin and Vout.
this case, should be use both logic and spice simulator.

plz let me know how to use function or tool for AC analysis. :(

I'm waiting for your advice :)
See you soon again ;)
ciao

Title: Re: AC analysis in verilog-ams
Post by boe on Oct 30th, 2009, 11:37am


sand_dolphin2 wrote on Oct 26th, 2009, 4:30pm:
...
i want to make AC analysis bellow case w/t verilog-HDL and Verilog-AMS.

  input analog V(Vin) => AD comparator(verilog-AMS)
   => LOGIC(verilog-HDL)
   => DA comparator(verilog-AMS) => output analog V(Vout)

I want to make AC analysis btw Vin and Vout.
The AC simulation is a small-signal analysis based on Fourier/Laplace transform of linear systems.
However your system contains several sources of non-linearity:
AD converter:
1. Quantization (highly non-linear for small signals [say, a few LSBs])
2. Clamping
3. Folding (for signal frequencies > fsample/2)
Logic:
4. depending on functionality.
DA converter:
5. Non-ideality
Therefore, there is no general solution to this, in particular w.r.t. items 1 and 4.
BOE
NB: Kens advice in http://www.designers-guide.org/Forum/YaBB.pl?num=1252743617

Title: Re: AC analysis in verilog-ams
Post by sand_dolphin2 on Nov 2nd, 2009, 12:10am

Dear Boe!!
at first, I apologize my much late response ( 1 week )...


boe wrote on Oct 30th, 2009, 11:37am:
The AC simulation is a small-signal analysis based on Fourier/Laplace transform of linear systems.
However your system contains several sources of non-linearity:
AD converter:
1. Quantization (highly non-linear for small signals [say, a few LSBs])
2. Clamping
3. Folding (for signal frequencies > fsample/2)
Logic:
4. depending on functionality.
DA converter:
5. Non-ideality
Therefore, there is no general solution to this, in particular w.r.t. items 1 and 4.
BOE
NB: Kens advice in http://www.designers-guide.org/Forum/YaBB.pl?num=1252743617

 
ohps!! :( I fully(?) understand your mentioned. that's right.
Sorry for my easy idea for asking AC analysis w/t Logic function.
 
 but in future, we should solve this item. :- 
 
 how about your opinion?
 Is there no way only w/t 3,4 your mentioned case ?
 maybe these points are the most important points.....
 
How to treat digital filter behavior depend on frq on AC analysis.
 
i want to solve .... not now but future. is it far from now? :-?
 
 

Title: Re: AC analysis in verilog-ams
Post by boe on Nov 2nd, 2009, 3:58am

sand_dolphin2,
Just a few ideas:
If we ignore errors from 1,2 and 5, and your digital block implements a digital filter, you are asking how to simulate a real-valued (= not quantized) discrete-time filter. For this, use sim strategy as for SC filters, which are also real-valued and time-discrete.
You could use Verilog-A models and PSS/PAC simulation of Spectre(RF), See e.g replies to http://www.designers-guide.org/Forum/YaBB.pl?num=1134027466 or http://www.designers-guide.org/Forum/YaBB.pl?num=1147370163.
MATLAB might also be a useful tool.
BOE

Title: Re: AC analysis in verilog-ams
Post by pancho_hideboo on Nov 3rd, 2009, 3:58am


boe wrote on Oct 30th, 2009, 11:37am:
The AC simulation is a small-signal analysis based on Fourier/Laplace transform of linear systems.
Not correct.


boe wrote on Nov 2nd, 2009, 3:58am:
For this, use sim strategy as for SC filters, which are also real-valued and time-discrete.
You could use Verilog-A models and PSS/PAC simulation of Spectre(RF)
You can not adopt PSS/PAC of Cadence Spectre to behavioral model simulation of Digital Filter or SCF using Verilog-A generally since there are hidden states.
http://www.designers-guide.org/Forum/YaBB.pl?num=1210932698/1#1


boe wrote on Nov 2nd, 2009, 3:58am:
MATLAB might also be a useful tool.
MATLAB is different from Simulink.


sand_dolphin2 wrote on Oct 26th, 2009, 4:30pm:
I want to make AC analysis btw Vin and Vout.
this case, should be use both logic and spice simulator.
Use cosimulation between spice type transient simulator and logic simulator.
http://www.designers-guide.org/Forum/YaBB.pl?num=1238242506/1#1

Here driving Vin by sinusoidal signal with varying frequency, you can evaluate frequency characteristics between Vin and Vout.


Title: Re: AC analysis in verilog-ams
Post by sand_dolphin2 on Nov 4th, 2009, 4:12pm

Dear Kita━━━━━━(゚∀゚)━━━━━━ !!!!!(i can't write down Panxxboo)
 

pancho_hideboo wrote on Nov 3rd, 2009, 3:58am:

sand_dolphin2 wrote on Oct 26th, 2009, 4:30pm:
I want to make AC analysis btw Vin and Vout.
this case, should be use both logic and spice simulator.
Use cosimulation between spice type transient simulator and logic simulator.
http://www.designers-guide.org/Forum/YaBB.pl?num=1238242506/1#1

Here driving Vin by sinusoidal signal with varying frequency, you can evaluate frequency characteristics between Vin and Vout.

 
so, at now we provide varying frequency from testbench.
and  dumpinig data frome results Vin/Vout transfer to excell csv format.
 
but, i want to automatically checking AC analysis w/o handmade making varying frequency input by testbench.
but this way is so take a much time to simulate.... 

Is it possible AC analysys of DUT(like as verilog-A(electrical only)) by spice's AC analysis which force automatically various freq.
 
I'll wait for your kindly responce. ::)  

Title: Re: AC analysis in verilog-ams
Post by pancho_hideboo on Nov 5th, 2009, 7:41am


sand_dolphin2 wrote on Nov 4th, 2009, 4:12pm:
so, at now we provide varying frequency from testbench.
and dumpinig data frome results Vin/Vout transfer to excell csv format.
but, i want to automatically checking AC analysis w/o handmade making varying frequency input by testbench.
but this way is so take a much time to simulate....
What procedure do you take and what instruments do you use in actual evaluation ?
Consider actual situation of evaluation.
Show me your realization method of AC Analysis in actual evaluation.

Learn measurements using actual instruments. Not "EDA Tool Play".



sand_dolphin2 wrote on Nov 4th, 2009, 4:12pm:
Is it possible AC analysys of DUT(like as verilog-A(electrical only))
by spice's AC analysis which force automatically various freq.
Do you understand AC Analysys correctly ?

If your intererst is limited to very narrow aspect of DUT, you might be able to use high abstract level modeling for DUT.
For example, if you can build "State Averaged Model" for target DUT, you can adopt conventional AC Analysis.

This "State Averaged Modeling" is well known as "Describing Function Method" or "Equivalent Transfer Function Method"
in Nonlinear Control Theory.

Equivalent Lowpass Model of RF Bandpass System is this "State Averaged Modeling".
Phase Domain Model of PLL is also this "State Averaged Modeling".

If you can know Z-domain Transfer function of Digital Filter or SCF, you can use conventional AC Analysis for evaluation of frequency characteristics of them.

What on earth do you expect for Verilog-AMS ?
Functional Verification ?
High Abstract Level Modeling of DUT with very narrow aspect ?



sand_dolphin2 wrote on Nov 4th, 2009, 4:12pm:
I'll wait for your kindly responce. ::)
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Title: Re: AC analysis in verilog-ams
Post by sand_dolphin2 on Nov 8th, 2009, 10:02pm


pancho_hideboo wrote on Nov 5th, 2009, 7:41am:
Do you understand AC Analysys correctly ?

If you can know Z-domain Transfer function of Digital Filter or SCF, you can use conventional AC Analysis for evaluation of frequency characteristics of them.

What on earth do you expect for Verilog-AMS ?
Functional Verification ?
High Abstract Level Modeling of DUT with very narrow aspect ?


Would you mind to let me know more about this methods( conventional AC Analysis ) ?

limited in my cace, finally means
 only to check Digital filter's AC analysis which you mentioned. :(
 

Quote:
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are you kidding? :-/ (killing?)
anyway thank you so much for your kind.

ciao! ;)

Title: Re: AC analysis in verilog-ams
Post by pancho_hideboo on Nov 8th, 2009, 10:29pm


sand_dolphin2 wrote on Nov 8th, 2009, 10:02pm:
Would you mind to let me know more about this methods( conventional AC Analysis ) ?
limited in my cace, finally means
 only to check Digital filter's AC analysis which you mentioned. :(
Still your expression is wrong.
It has to be "Evaluation of Digital filter's Frequency Characteristics".

Generally you have to use Transient Analysis for "Evaluation of Digital filter's Frequency Characteristics".
Here frequency characteristics is evaluated by DFT of impulse response.
Again see http://www.designers-guide.org/Forum/YaBB.pl?num=1210932698/1#1

If you want to use AC analysis for "Evaluation of Digital filter's Frequency Characteristics",
you have to describe transfer function as Z-domain expression.
That's all.

Still if you can't understand,
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Title: Re: AC analysis in verilog-ams
Post by sand_dolphin2 on Nov 9th, 2009, 12:02am


pancho_hideboo wrote on Nov 8th, 2009, 10:29pm:
Still if you can't understand,
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Thank you so much for your correct!!
I fully understand your mentioned(maybe will be ...).
ciao ;)

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