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https://designers-guide.org/forum/YaBB.pl Modeling >> Semiconductor Devices >> What is the "passivation" layer in IC process https://designers-guide.org/forum/YaBB.pl?num=1237305360 Message started by DoYouLinux on Mar 17th, 2009, 8:56am |
Title: What is the "passivation" layer in IC process Post by DoYouLinux on Mar 17th, 2009, 8:56am Dear All, I had a look at a layer description of an IC process. At the top, I saw a layer called "passivation". I don't know what it is and what it is for. Could someone suggest me about this ? :D I have searched from the internet, but did not find anything useful. Thanks in advance, DYL ;) |
Title: Re: What is the "passivation" layer in IC process Post by Frank Wiedmann on Mar 18th, 2009, 1:38am It's a protective layer that usually covers the entire chip except for bondpads. |
Title: Re: What is the "passivation" layer in IC process Post by DoYouLinux on Mar 18th, 2009, 1:54am Hi Frank, Thank you very much for your reply. Hmmm I know this now :) DYL :) |
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