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https://designers-guide.org/forum/YaBB.pl Simulators >> AMS Simulators >> issue with elaborating in ams using ade https://designers-guide.org/forum/YaBB.pl?num=1238493931 Message started by idriss on Mar 31st, 2009, 3:05am |
Title: issue with elaborating in ams using ade Post by idriss on Mar 31st, 2009, 3:05am hello guys In my hierarchy editor for one cell I use for view source code verilogams,this model contains a functionnal model in verilog wher a primitive u_lva2hvb is defined and the instance is named lv_i within the code. When I compile with ams simulator engine in my ADE using all the rights options for netlisting etc.. no problems but when it elaborates it crash with this message ncelab: *E,CUCFUN: instance 'lv_i' of the unit 'u_lva2hvb_e' is unresolved in 'C045LP_SC_18_LEVEL_LSHO25.HV45_O25_DLSUCIHLX4:module is someone knows what it means and how can it be solved, HV45_O25_DLSUCIHLX4 is the cell I replaced by the verilog code which got the primitive and of course it's a module because it's a source code (option choosen in the config) |
Title: Re: issue with elaborating in ams using ade Post by Andrew Beckett on Mar 31st, 2009, 9:30am I didn't quite follow your explanation (it didn't crash; that's an error message). You may want to specify the library the code is referenced in the library list in the config, so it knows where to search. Or it might be something to do with the fact that the module being looked for is called "u_lva2hvb_e" but you said the module you'd referenced was called "u_lva2hvb" (i.e. no "_e" at the end)? Regards, Andrew. |
Title: Re: issue with elaborating in ams using ade Post by boe on Mar 31st, 2009, 11:07am idriss, ADE flow has (at least in some Versions of IC 5.1.41) a problem with hierarchical (Verilog[-AMS]) code. Somehow the generated compile script is incomplete although HED shows full hierarchy of the code with correct views. It happens reproducably with certain cells, but so far I have not been able to figure out what is wrong with these cells. My work around (until I have time to investige the issue) is: I have written a compile script for these cells (using the compile script generated by the ADE [in the simulation netlist dir] as template) and running that script whenever I get the error... BOE |
Title: Re: issue with elaborating in ams using ade Post by idriss on Apr 1st, 2009, 8:20am Hi Andrew and Boe first of all,thank you very much for your answers: actually Boe, I didn't make any typo errors in the model I didn't forget the _e. I think Andrew is right something is going wrong during the compilation. I am going to rexplain what I did: in the hierarchy editor for a library colp.... and cell HV45... I set the view to verilog reference which is a verilogams model idris which is in an other directory,until now nothing is wrong I am allowed to do that,this ams model contain and define a primitive called "u_lva2hvb_e". In the ADE when it compiles no issues,but when it elaborate I have this issue ncelab: *E,CUCFUN: instance 'lv_i' of the unit 'u_lva2hvb_e' is unresolved in 'C0LP_SC_18_LEVEL_LSHO25.HV45_O25_DLSUCIHLX4:module. DO you see Boe what I mean, so what I did is in the directory where was the vams,I could see the 'u_lva2hvb_e' ,but couldn't open it,so I put in it the vams model of idris.so ok it could be open,but still the issue remains. Andrew can you please show me an example of a script you use to solve this,because I tried to do like you said with the netlister but doesn't work. I will appreciate thank you very much, Idris |
Title: Re: issue with elaborating in ams using ade Post by boe on Apr 1st, 2009, 9:33am idriss, I use a ksh shell script, which I have in my Cadence run dir, like this: Code:
Please note that you may need to adjust the compile switches to fit your requirements. I advise you to refer to the compile script ADE generates ($AMS_NETLIST_DIR/runCompileOnly) as well. Hope this helps. BOE |
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