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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> biase voltage of opamp in pipelin adc https://designers-guide.org/forum/YaBB.pl?num=1239201766 Message started by frankdhz on Apr 8th, 2009, 7:42am |
Title: biase voltage of opamp in pipelin adc Post by frankdhz on Apr 8th, 2009, 7:42am After changing from sample phase to amplify phase ,the Cs and Cf disconnect from input common voltage of the opamp in the MDAC . How dose the input DC biase voltage can be sustained during the amplify phase? |
Title: Re: biase voltage of opamp in pipelin adc Post by rf-design on Apr 11th, 2009, 2:14am I could not imagine how the amplifying SC circuit make a floating connection to the opamp inputs. General the inputs of the opamp must have a specific potential. Otherwise the common mode input voltage drift with a period and more critical the output is undefined. If your SC-circuit does not need the opamp in a phase switch it off. Please post a schematic. |
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