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Simulators >> Circuit Simulators >> How to simulate DC/DC converter stability?
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Message started by Steven C. on Apr 14^th, 2009, 6:54pm

Title: How to simulate DC/DC converter stability?
Post by Steven C. on Apr 14^th, 2009, 6:54pm

Hey guys,

I have some difficulty with simulating the stability of DC/DC converter. Right now, I got two ideas to deal with that.
1. Create a linear model for the PWM blocks, and run "stb" analysis. Is this result trustable?
2. Run "pss+pstb" analyses. The problem is I dont even know how to do it. Could somebody teach me how to do this?

Thanks.

Title: Re: How to simulate DC/DC converter stability?
Post by Andrew Beckett on Apr 15^th, 2009, 2:55am

I've done this with PSS + PSTB, and it works well.

Assuming you have some kind of clock pulse for your DC to DC converter, you should be able to run PSS with that period or frequency specified. You might need to give it a tstab time to allow it to get started (although this doesn't normally need to be the time for it to be settled).

Then place an iprobe in the feedback circuit, and setup pstb analysis to point to that and sweep the frequency so you can analyse the loop gain.

If you contact me at Cadence (my email address is my first name followed by the first letter of my surname, at cadence dot com), then I can send you a presentation on this that I gave at a National Microelectronics Institute Power Electronics event last year (in the UK).

Regards,

Andrew.

Title: Re: How to simulate DC/DC converter stability?
Post by Steven C. on Apr 20^th, 2009, 7:17pm

Dear Andrew, very appreciate about your reply. And its so great that I came to the right place for seeking this help.

Could you please send me a copy you gave last year in UK, it will be so helpful.

Thanks.