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Design >> Analog Design >> using MOS as a resistor for very low cutoff filters
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Message started by vivkr on Apr 24^th, 2009, 1:33am

Title: using MOS as a resistor for very low cutoff filters
Post by vivkr on Apr 24^th, 2009, 1:33am

Hi All,

I am trying to make a very low cutoff frequency filter (~ 1 Hz), and the choice is between using a gmC variant based on an active stage biased with very low current, and a MOS transistor biased for very large resistance with a capacitor. The whole idea of course is to make it with a small cap (~100 pF).

The gmC approach seems to work OK but introduces some offset, and I was thinking of using a MOS as a switch to get offset-free behavior.

However, the MOS obviously acts as a half-wave rectifier with this large cap when there are large out-of-band signals. This worsens the out-of-band suppression limiting it to about -40 dB which would be enough still, but this also introduces a large offset which is the consequence of the rectification process. It is the latter which is the problem.

Could someone suggest what one may do to minimize this large rectification-induced-offset? Or is this a fundamental limitation that I cannot get around?

Otherwise, I could make the MOS-C filter with far lower area than the gmC filter. For better linearity, I am controlling the gate drive to track the input signal.

Thanks,

Vivek

Title: Re: using MOS as a resistor for very low cutoff filters
Post by Asmodeus on Apr 24^th, 2009, 4:01am

gm-C filters are usually used for high frequency applications. Making 1Hz cut-off filter with it will ask for having very small gm in the range of nA/V. Its a diff task to get a stable gm, as only weak inversion transistors can give this gm. Though people have reported such transconductance amplifier with such low gm. You can refer to them.

I will suggest you to try a MOS-C approach.

Title: Re: using MOS as a resistor for very low cutoff filters
Post by thechopper on Apr 25^th, 2009, 6:48pm

Hi Vivek,

MOS-C I think is the best approach for very low cut-off frequency filters. In order to minimize the distortion the MOS might introduce you could put several MOS devices in series to achieve a very large RON. In this way you reduce the effective swing accross each of them and therefore reducing the overall distortion.
There are also other techniques which control the gate voltage to cancel out the introduced distortion. There is an old paper describing these techniques:

"Continuous-Time MOSFET-C Filters in VLSI" Y. TSIVIDIS, IEEE JOURNAL OF SOLID-STATECIRCUITS, FEB 1986.

Regards
Tosei

Title: Re: using MOS as a resistor for very low cutoff filters
Post by vivkr on Apr 26^th, 2009, 11:28pm

I would like to add here that achieving the low gm in a gmC filter is the least of all problems. With a bias current level of around 100 nA and proper sizing, I am able to make the gmC filter anyway (weak inversion is not necessary, as a matter of fact weak inversion increases the gm/Id and reduces the input range).

And such a filter has already been tested several times on silicon, so it is not a question of concept. I was trying to use a MOS-C structure (with several MOS in series) but even with perfectly signal-independent Vgs for the MOS, there is still the rectification effect remaining. You can see this from the fact that the effective "source" changes depending on whether the signal at the input side is larger or smaller than the lowpass filtered version of it on the output side, causing current to flow out of the output cap when the input goes lower, and this causes a halfwave rectification.

Anyway, it seems that the rectification is making the approach unsuitable. Thanks all the same for the comments and references.

Regards,

Vivek