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Design >> Analog Design >> regarding step repsonse of the amplifier
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Message started by vamshikrishna on Apr 25^th, 2009, 1:20am

Title: regarding step repsonse of the amplifier
Post by vamshikrishna on Apr 25^th, 2009, 1:20am

Hi,

I have a question on the step response of the amplifier which is a 4th order system. It has a 3poles and 2 zeros other than the dominant pole.

This amplifier has phase margin of 74degrees, but still the step response is not exactly exponential (single pole), which can be seen in the zoomed version of the figure.

Since this is 4th order system the other poles,zeros might be causing this, can any one tell intuitively why this happens in the step response,and also the way to avoid this happening?

My next question is what effect this would have,if this amplfier is used in ADC?

Title: Re: regarding step repsonse of the amplifier
Post by buddypoor on Apr 25^th, 2009, 1:32am

yvkrishna wrote on Apr 25^th, 2009, 1:20am:

Why do you expect an "exactly exponential" response ?
This is the case for a first order system only. Of course, all other poles influence the step response. When they come closer to the dominant pole, the step response will exhibit overshoot and ringing. That´s pure system theory.

Title: Re: regarding step repsonse of the amplifier
Post by vamshikrishna on Apr 25^th, 2009, 1:42am

hi buddypoor,

Thanks for the reply. I dont mean exact exponential and was doubtful about the shape of curve, since this is not the overshoot/under shoot case. It starts exponential initially tries to settle at some point, but again moves up to reach the final value.

I agree that first order system only will have exp curve, but we can achieve that in this amplifier also if designed carefully.

Infact my actual question is what care should be taken while working with 4th order systems to get proper step respnse without overshoots/undershoots.

Thaks
vamshi

Title: Re: regarding step repsonse of the amplifier
Post by buddypoor on Apr 25^th, 2009, 3:34am

For my opinion, the response as shown in the figure looks rather good, don´t you think so ?
There is no overshoot ; the settling time to reach the final value may come from an pole-zero-doublet which is not exactly matched.

Title: Re: regarding step repsonse of the amplifier
Post by vamshikrishna on Apr 25^th, 2009, 3:46am

hi buddypoor,

I agree the response shown is good, but I just wanted to know if we can even precisely control this by tweaking some coefficients like zeta here.
My transfer func looks like this after the dominant pole approxim:

(1-s*tauZRHP)(1+s*tauZLHP)
------------------------------------
(s*tauGBW)*(1+s*tau1)(1+s*tau2+s^2*tau3)

PS: Can some one provide me with a reference for 4th order system design.

Thanks
vamshi

Title: Re: regarding step repsonse of the amplifier
Post by buddypoor on Apr 26^th, 2009, 2:18am

yvkrishna wrote on Apr 25^th, 2009, 3:46am:

PS: Can some one provide me with a reference for 4th order system design.

What do you really need ? 4th order filter design ?
It´s not clear to me. Sorry.

Title: Re: regarding step repsonse of the amplifier
Post by vamshikrishna on Apr 26^th, 2009, 2:42am

I need some information(thumb rules) regarding location of poles and zeros in a 4th order system so that we can approximate it as a first order system.

Especially the complex conjugate poles cause ringing in this amplifier case even with more than 75 degrees of phase margin (whereas 75deg phase margin doesnt give any ringing in a second order system).

Thanks
vamshi

Title: Re: regarding step repsonse of the amplifier
Post by sheldon on Apr 26^th, 2009, 3:02am

Vamshi,

Have you run Monte Carlo analysis on your circuit? You are
relying on precise matching of the poles and zeroes to cancel
each other. Small misses in the cancellation result in doublets
that degrade settling.

Best Regards,

Sheldon

Title: Re: regarding step repsonse of the amplifier
Post by vivkr on Apr 27^th, 2009, 7:38am

yvkrishna wrote on Apr 26^th, 2009, 2:42am:

I have to agree with buddypoor. If you make a 4th order system, you cannot expect a 1st order response. If you really want it that badly, then put all the pole/zero doublets beyond the unity-gain frequency of your closed-loop system. Then the effect of doublet-induced transients should vanish.

In other words, if you want a first-order response, then you have to make your system first-order. You can work out what your various coefficients would need to be for that.

Regards,

Vivek

Title: Re: regarding step repsonse of the amplifier
Post by vivkr on Apr 27^th, 2009, 7:43am

yvkrishna wrote on Apr 25^th, 2009, 1:20am:

Hi,

My next question is what effect this would have,if this amplfier is used in ADC?

This would depend on what kind of ADC you are making and what inputs you are giving it.

For a pipelined or cyclic or other form of switched-capacitor-based ADC, the above response may be unacceptable because the slow settling of the doublet would either degrade performance too much, or force you to operate at lower speed and/or higher current levels.

For a continuous-time delta-sigma modulator, the above response may not be an issue, provided that you have some pre-filtering that prevents your modulator's STEP RESPONSE from being excited. As long as the input consists of a combination of finite sine wave inputs and the overall signal level is small (all very diffuse terms as you notice), your amp may be useful. As soon as the step response of the amp comes into play or your amp slews, you are in trouble.

Regards,

Vivek

Title: Re: regarding step repsonse of the amplifier
Post by vamshikrishna on Apr 27^th, 2009, 9:27am

Thanks for sharing your views. I am sorry to make this topic so complicated and wasting your valuable time

Actually I am not canceling any pole/zeros in the above circuit, and I am just pushing them far away from ugb.

may be i am wrong i felt that the more and more the phase margin the system behaves as single pole system.

infact I am unable to predict the settling time analytically taking settling precision into account,
for example here i need 10bit so approxim 7.5 time constants, but due to effect of nondom poles/zeros on the step response it settles in 4-5 time constants only.

so how to take this into account mathematically?

Thanks
vamshi

Title: Re: regarding step repsonse of the amplifier
Post by vivkr on Apr 27^th, 2009, 11:37pm

Hi Vamshi,

A single-pole settling can be achieved with higher phase margin provided there are no doublets in the unity gain band. Doublets may not affect stability very much but they do impact the step response appreciably, as you have found out.

Typically, doublets and nondominant poles etc. can be minimized by making the opamp as simple as possible (folded cascode/telescopic). I would recommend this course. Also, would be better off trying to find where these pole/zero pairs come from and pushing them out of band. This would be better than trying to analytically account for the effects of incomplete settling as this may be very dependent on process, supply and signal levels, and you will likely find it difficult to achieve consistent performance.

Regards,

Vivek