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Simulators >> AMS Simulators >> spectreVerilog netlist problem
https://designers-guide.org/forum/YaBB.pl?num=1241911946

Message started by jsun on May 9^th, 2009, 4:32pm

Title: spectreVerilog netlist problem
Post by jsun on May 9^th, 2009, 4:32pm

Hi

While I used spectreVerilog for mixed-signal simulations, while netlisting I got the error message:

"The analogLib library you have currently loaded is not convenient
for simulator spectreVerilog".

Does anybody know what it means?

Thanks a lot!

JS

Title: Re: spectreVerilog netlist problem
Post by Berti on May 11^th, 2009, 12:21am

Hi Jsun,

I had recently a similar problem. The reason was that those id##ts from the fab defined the required view for simulation depending on the simulator (spectre-> spectre view, spectreverilog -> spectreverilog view etc.)

Adding

--------------
UARTspectreVerilogStopViewList="spectre"
setq UARTStoreMenusInCurrent t
loadi(strcat(getShellEnvVar("UNICAD_KERNEL_ROOT") "/Uker.ile"))
---------------

in your cds.init file should work-around the problem.

Cheers

Title: Re: spectreVerilog netlist problem
Post by jsun on May 11^th, 2009, 4:30pm

Hi Berti,

Thanks a lot! It works now... :)

js