The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design Languages >> Verilog-AMS >> VerlogA, AHDL, VerilogAMS
https://designers-guide.org/forum/YaBB.pl?num=1242302581

Message started by casual on May 14^th, 2009, 5:03am

Title: VerlogA, AHDL, VerilogAMS
Post by casual on May 14^th, 2009, 5:03am

May I know the differences among verilogA, verilogAMS, AHDL & system Verilog?
Is verilogAMS equal to verilogA + verilog?
I am new in this area.

Title: Re: VerlogA, AHDL, VerilogAMS
Post by jbdavid on May 14^th, 2009, 6:30pm

Actually: Verilog-AMS = Verilog-A + Verilog(-D) + the Mixed Signal Interaction stuff..
ie
--
there are selections from the LRM available on this site
always @(cross(V(in))) begin
end

analog begin
@(posedge Sel) begin
end
end

Title: Re: VerlogA, AHDL, VerilogAMS
Post by casual on May 15^th, 2009, 5:36pm

thanks. I have found the informtion from web.