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Design >> RF Design >> frequency divider phase noise question
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Message started by t6 on May 28^th, 2009, 8:19am

Title: frequency divider phase noise question
Post by t6 on May 28^th, 2009, 8:19am

Hello,

In Ken's paper "Predicting the Phase noise and Jitter in PLL Frequency Synthesizers" the equation for the divider output noise is:

SΦ(f)=[2*Π*f0/(dv(iT)/dt)]^2 *Sn(f)

Is f0 the input or output frequency of the divider?

Title: Re: frequency divider phase noise question
Post by rfmems on May 28^th, 2009, 8:45am

I think it refers to output

Title: Re: frequency divider phase noise question
Post by t6 on Jun 11^th, 2009, 2:58pm

Thanks for your response. This is what I thought, just wanted to confirm.