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Design >> Analog Design >> multi-vt device
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Message started by Dipankar on Jun 26^th, 2009, 6:10am

Title: multi-vt device
Post by Dipankar on Jun 26^th, 2009, 6:10am

Dear All,

Even if process (MM/RF 0.18 um) allows different vt mosfets is it a bad practice to use different vt device in a design from yield point of view ? And is there any other demerit associated ? Please advise.

Title: Re: multi-vt device
Post by ic_engr on Jun 26^th, 2009, 8:27am

For analog Design you would want to use High VT devices, as they are the ones with good rds. From my experience, even if you use devices with different VTs your yield should not be impacted. You can confirm this by performing Monte Carlo Simulations.

Processes allow multi VT devices, e.g Standard VT, High VT and Low VT devices in addition to zero VT devices and designers can combine devices, dilligently decide where to use.

A good example is if you have headroom problems, you can make the input pair devices of opamp, a standard VT device, with load devices and tail current devices still at HVT.

Try not to use other than HVT for current sources, as everything other than HVT devices have poor RDS, which is important for constant current source.

ic_engr.

Title: Re: multi-vt device
Post by ic_engr on Jun 26^th, 2009, 8:29am

You aslo should ensure that in using low VT or standard VT devices your devices do not violate the reliability limits.

ic_engr

Title: Re: multi-vt device
Post by Dipankar on Jun 26^th, 2009, 7:32pm

Dear ic_engr,

Thanks for the prompt reply. Actually, we have std vt, low vt and neg vt device offered by process. In my design I predominantly use std vt except few mosfets (3 of them) , for which I need to use low vt. Now my boss is hesitating to allow me use them because : 1) extra mask for only 3 mosfets 2) yield risk (?????). Before consulting with our marketting, I wanted to get an opinion here. Any experience sharing regarding this will be very much welcomed.

Title: Re: multi-vt device
Post by vivkr on Jun 28^th, 2009, 11:06pm

Hi Dipankar,

In addition to the extra mask, there may be some yield impact if you make a mixed design using transistors with different Vt which need to match somehow. A trivial example of this would be if you were to build a current mirror using 2 different types of transistors. Of course, nobody would do this but this is to show the extreme case. In general, I would use a current signal rather than a voltage signal when moving between different kind of transistors to avoid this problem.

Please also be aware that different types of transistors will not lie on the same process corner, and you cannot simulate this in a straightforward way. Since most corner models will put all transistors at the same process corner (typical mean, worst speed etc.), you will not see the effects which arise when your 3V transistors are typical and the 1.8V ones more towards worst-speed.

A good analog fab would be able to give you a better and tighter match of process parameters even for different kind of transistors but I suppose you are using TSMC or some such vendor.

Best regards,

Vivek