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https://designers-guide.org/forum/YaBB.pl Simulators >> AMS Simulators >> AMS and Labview cosimulation https://designers-guide.org/forum/YaBB.pl?num=1246034632 Message started by mehregan on Jun 26th, 2009, 9:43am |
Title: AMS and Labview cosimulation Post by mehregan on Jun 26th, 2009, 9:43am I am curious if anyone has ever considered tying Verilog / AMS to labview for the purpose of virtual test development using hardware models. Would be most interested in a true co-simulation that would step through time and pass test commands and measurements between the labview test code and the hardware model written in Verilog-HDL/AMS. I would think this is possible using PLI but I am not aware of any existing support for this capability. |
Title: Re: AMS and Labview cosimulation Post by Riad KACED on Aug 12th, 2009, 10:25am Hi Mehregan, I don't know of any built in AMS designer-Labview flow I'm afraid. First idea that sprang to my mind is using Matlab to bridge this gap. Matlab ties well with both AMS Designer and labView. I have never tried it though, just a though that might trigger other ideas ... Cheers :) Riad. |
Title: Re: AMS and Labview cosimulation Post by Andrew Beckett on Aug 15th, 2009, 3:41am I did something similar years (16 years?) ago with SaberVerilog and using GPIB to control some measurement equipment. In my case it wasn't with feedback from the actual measured chips - I was primarily doing it to control the test equipment to get the design into a test state and then measure some of the internal blocks. So it can be done. I must admit I've forgotten how I did it. It may have been PLI-based (probably not VPI, because it pre-dates VPI), if my memory is correct. Regards, Andrew. |
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