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https://designers-guide.org/forum/YaBB.pl Simulators >> AMS Simulators >> Efficient way of Defining MACROs(Directives) Globally https://designers-guide.org/forum/YaBB.pl?num=1246975087 Message started by Dipankar on Jul 7th, 2009, 6:58am |
Title: Efficient way of Defining MACROs(Directives) Globally Post by Dipankar on Jul 7th, 2009, 6:58am Dear Experts, I am new to AMS Designer. Curently I am facing an issue of globally defining MACROs in AMS. Let me first tell you the flow I am following. Please let me know if something is wrong. Flow : Artist based AMS ( not the Hierarchy editor Plug-In) steps : First, I verilog-in the RTL library (It's a hierarchical one) from CIW. In RTL library my TOP .v contains definition of the top module , many MACROs defined by `define statement and many files included by `include statement. Through the Library Manager I can see that all the modules/cells have functional view and symbol view. But the MACROs and `include are missing at the top. 2nd, I create config view of my TB and I can see all the verilog modules (except the modules with 'celldefine) used in my design at HE . so far so good. 3rd, Now I need to give AMS the MACRO values. I provide MACRO info like this : Simulation->Options->Compiler-> MACRO : MACRO name, MACRO value. It works for one macro. But I have a long list of macros. Currently I give the mostly used macro info there and add `define XXX for the others at the respective cells. But Can you suggest a better soln. for global definition ? I also tried to define these macros at the top but without any result. |
Title: Re: Efficient way of Defining MACROs(Directives) Globally Post by Peruzzi on Jul 7th, 2009, 9:33am Dipankar, I've done that sort of thing by defining the macros in the hdl.var file. I don't recall the syntax and don't have access to Cadence tools while I'm between gigs so I can't give you an exact solution but I hope this directs you down the correct path. Cheers, Bob P. www.RPeruzzi.com |
Title: Re: Efficient way of Defining MACROs(Directives) Globally Post by Dipankar on Jul 11th, 2009, 1:19am Dear BOB, Thnx for the hint. Actually I listed all my `define from a xxx.v and included that xxx.v from ADE->Simulation->Option->netlister. Looks like working fine. |
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