The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> Help with DDR LDO
https://designers-guide.org/forum/YaBB.pl?num=1248180301

Message started by refugee on Jul 21^st, 2009, 5:44am

Title: Help with DDR LDO
Post by refugee on Jul 21^st, 2009, 5:44am

My recent work is to design a LDO for DDR I II III. Now I meet some problems. Please give me some advise.
The design aim is to design a LDO that can both sink and source current (+/- 10mA). The output voltage range is 0.75V ~ 1.25V, the output cap is 100nF (So, the output should set as the main pole), the output voltage accuracy is +/- 10mV

Because the system could both source and sink current, So, I want to know how to design a circuit that control which loop turn on

Thank you for your help

Title: Re: Help with DDR LDO
Post by ywguo on Sep 24^th, 2009, 6:12pm

Hi,

It sounds like a DDR output driver, not like a LDO. :)

Yawei

Title: Re: Help with DDR LDO
Post by raja.cedt on Sep 24^th, 2009, 10:05pm

hi,
you have specifications with you right, then start fix loop gain based on settling and you have given accuracy 10mv now find open loop gain

Thanks,
Rajasekhar.

Title: Re: Help with DDR LDO
Post by loose-electron on Sep 29^th, 2009, 11:12am

This is not an LDO - its better known as an OTA (Operational Transconductance Amplifier)