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Design >> RF Design >> Optimizing switch sizes of Coarse tune capacitor bank in LC VCO
https://designers-guide.org/forum/YaBB.pl?num=1249412760

Message started by scv on Aug 4^th, 2009, 12:05pm

Title: Optimizing switch sizes of Coarse tune capacitor bank in LC VCO
Post by scv on Aug 4^th, 2009, 12:05pm

I am designing a 10G LC VCO w/ a tunable capacitor bank. What tests must one run to optimize the MOS switches that are in series with the capacitors? I can only think of the following:

1. On/Off ratio of capacitance at input of switch
2. Phase noise degradation due to Q of switch+cap combination.

Are the above steps a correct way of optimizing switch sizes? Any other way to optimize them?