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Design Languages >> Verilog-AMS >> Decimal to binary conversion
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Message started by nishant22 on Aug 11^th, 2009, 3:06am

Title: Decimal to binary conversion
Post by nishant22 on Aug 11^th, 2009, 3:06am

hi,
I am writing a testbench, with stimulus in VA in which I have few buses of width around 69 bits, so I want user to specify the decimal value and my resepective data paths get ON or off basically get 1 or 0. So I want to carry out Decimal to binary conversion in VA. So if u specify decimal value of 4 and my bus is 40 bits, i shud get 0...0100 . I want to write this model in pure verilog-A not ams for some restrictions. Can anyone please help or send me a code, its re\ally urgent.It would be really useful. I have seen many C/C++ codes, but VA restrictions don't allow me to use those functions.

Thanks ,
NIshant

Title: Re: Decimal to binary conversion
Post by nishant22 on Aug 14^th, 2009, 2:27am

Hello All.

can anyone please help?

Thanks,

Title: Re: Decimal to binary conversion
Post by Sumit Adhikari on Aug 14^th, 2009, 6:03am

use it like following

integer val_int ;
real val_real ;
logic [68:00] your_bus ;

always @(val_int) your_bus = val_int ;

analog
begin//{
val_int = val_real ;
end//}

Title: Re: Decimal to binary conversion
Post by boe on Aug 14^th, 2009, 7:20am

Please note that real does not have a resolution of 69 bits (Standard IEEE double precision real has a 52-bit mantissa).
BOE

Added: Verilog-A does not guarantee integers to be larger than 32 bit either.

PS: Is your signal constant?