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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> designing peaking in input match with good group delay https://designers-guide.org/forum/YaBB.pl?num=1252504099 Message started by vivkr on Sep 9th, 2009, 6:48am |
Title: designing peaking in input match with good group delay Post by vivkr on Sep 9th, 2009, 6:48am Hi all, I need to design an input match network for my wideband Rx. I am using an inductor to get some dB peaking into my capacitive load (amp input). However, the phase response is ruined by this. So I would like to build an equalizer up front. I used methods outlined on Dr. Howard Johnson's website. I can reduce the spread of group delay quite well like this, and I also get good peaking but the method adds in a fixed attenuation which keeps getting larger and larger as you increase the peaking. In other words, I can get peaking at my halfbaud but this is symbolic (more or less) as the absolute power level remains more or less the same in dB. I am only reducing the lower-frequency gain of my system. I tried some similar variants. The basic idea is described in: http://www.sigcon.com/Pubs/edn/ConstantREqualizer.htm Is there a good way which can be used to get real peaking and gain while preserving a decent phase response? Any ideas are most welcome. Best regards, Vivek |
Title: Re: designing peaking in input match with good group delay Post by aaron_do on Sep 9th, 2009, 6:45pm Hi Vivek, I'm not sure how well it would work with on-chip inductors, but have you tried a simple multi-stage matching network? i.e. cascaded L sections. What kind of bandwidth are you looking at and is it your signal bandwidth or the system bandwidth? cheers, Aaron |
Title: Re: designing peaking in input match with good group delay Post by vivkr on Sep 10th, 2009, 12:16am aaron_do wrote on Sep 9th, 2009, 6:45pm:
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