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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Running code depending on clock and time. https://designers-guide.org/forum/YaBB.pl?num=1254831300 Message started by eddie on Oct 6th, 2009, 5:15am |
Title: Running code depending on clock and time. Post by eddie on Oct 6th, 2009, 5:15am Hello Everyone. Just a quick query. I have a block of code that needs to run on the leading edge of a clock (so I intend to look at the voltage, if v > a threshold, then run the code). But I need the code to run for a time longer than the pulse with of the clock, lets say 3 clock cycles. If I use the conditional with a threshold it will see the leading edge but as soon as the simulator runs the block of code again when the clock is low the code I need running will stop, as naturally v is less than the threshold. Any way I can detect the rising edge and set the code going until a time or event later. Btw, the code implements a RC time constant discharge. The problem I have at the moment is that as soon as the pulse goes low the discharge stops prematurely. Thanks. Ed |
Title: Re: Running code depending on clock and time. Post by Geoffrey_Coram on Oct 8th, 2009, 6:13am Is this Verilog-A? What sort of a net is your voltage? @(initial_step) active = 0; @(cross(V(in) > vth)) active = 1; if (active) begin // do your code end |
Title: Re: Running code depending on clock and time. Post by rajdeep on Oct 9th, 2009, 4:02am You can schedule events in Verilog-A. But Im not sure whether your code is in Verilog-A or Verilog-AMS. I guess in Verilog-AMS things could be easier for you. Anyway not sure abt the question!! :-p Rajdeep |
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