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Design >> Mixed-Signal Design >> About behavior modelling of ADC
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Message started by VINAY RAO on Oct 12^th, 2009, 9:11pm

Title: About behavior modelling of ADC
Post by VINAY RAO on Oct 12^th, 2009, 9:11pm

In behavior modelling of flash ADC,by simulating the idea of architecture ,is it possible to predict the resulting sampling frequency of the ADC???.
We need to include real time delays while simulating to anticipate the sampling rate for the architecture we selected??

Title: Re: About behavior modelling of ADC
Post by Berti on Oct 13^th, 2009, 6:09am

The sampling frequency is usually given by the application/specifications. I think you question is formulated in a strange way.

Cheers

Title: Re: About behavior modelling of ADC
Post by VINAY RAO on Oct 13^th, 2009, 7:17am

Then how to predict the selected architecture will give the required sampling frequency???,,only depends on the previous works on the architecture ?? or by behaviour modelling in simulation we can anticipate it??

Title: Re: About behavior modelling of ADC
Post by Berti on Oct 13^th, 2009, 10:34pm

I think that you first have do derive the block/circuit specifications and than decide whether you can realize that or not.
... that can in principle also done with paper and pencil ...

Regards