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Design Languages >> Verilog-AMS >> Re: Trouble with veriloga in hspice simulator
https://designers-guide.org/forum/YaBB.pl?num=1255461524

Message started by patrick on Oct 13^th, 2009, 12:31pm

Title: Re: Trouble with veriloga in hspice simulator
Post by patrick on Oct 13^th, 2009, 12:31pm

Hi,

Can you post the VA file and the HSPICE version/platform you are using? I'll take a look and see what's going on.

If you suspect it's the compiler, then you can run

hsp-vacomp myfile.va

and see does it crash or does it produce a CML file in the same directory. If you get a CML file then the compiler is running fine, there is something wrong in the simulator itself.

Regards,
Patrick
Tiburon-DA