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Simulators >> Circuit Simulators >> stability simulation of bandgap
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Message started by bottom_up on Oct 19^th, 2009, 8:23am

Title: stability simulation of bandgap
Post by bottom_up on Oct 19^th, 2009, 8:23am

Dear all
I want to design a bandgap reference circuit. Now, I have determined which structure I would choose .But I have the problem with which parameters I should simulate and how to simulate them by hsipce.
For example, how to simulate the stability of the circuit . In details, what stimulus I should add to the circuit ,and how to analyze the results.

Thanks a lot.
Bottom

Title: Re: stability simulation of bandgap
Post by Riad KACED on Oct 19^th, 2009, 12:48pm

Hi,

There are many ways to simulate the stability.
The most common one for your BG is to run an AC analysis and look at the open loop gain and phase along with the gain and phase margins. All what you need is a testbench where you put your design and a stimulus with 1V AC DC source (1V to directly read the gain without any divisions). In the old days, we used to open the AC loop and leave the DC loop closed in order to keep all the devices at the right operating point around which you exercise the small signal anaylsis. Nowadays (with Spectre at least), you don't really need to

My advice for you is:

1. Look at your Analog Design book to learn things about feedback analysis, gain, phase ... etc
2. Look at the Hspice doc for more details about the AC analysis. I'm a Spectre user as far as I'm concerned.

If you are really in a hurry, then run a quick transient and if it the output oscillates then it is instable :-[

Cheers,
Riad.

Title: Re: stability simulation of bandgap
Post by raja.cedt on Oct 19^th, 2009, 9:58pm

hi,
one point i would like to add is break the loop where both +ve and -ve feedback are intersecting.

Thanks,
Rajasekhar.

Title: Re: stability simulation of bandgap
Post by glacieryy on Oct 22^nd, 2009, 7:04am

Hi,all
I have met a similar problem is ,the amplifier used in my bandgap is self_biased. In detail ,the output of the amplifier is the input(gate voltage) of the bias mosfet. In this case ,I am puzzled with how to break the loop.

Regards
glacier

Title: Re: stability simulation of bandgap
Post by yvkrishna on Oct 23^rd, 2009, 4:51am

hi glacier,

Breaking at the output of the amplifier is the only way to break all the loops in this case.

thanks,
vamshi

Title: Re: stability simulation of bandgap
Post by raja.cedt on Oct 23^rd, 2009, 8:24am

hi glacier,
i guess self bias means all bias voltages will be generated by internally, so whats the problem while breaking? because while analyzing stability through breaking we should not disturb bias voltage.

Thanks,
rajasekhar.

Title: Re: stability simulation of bandgap
Post by Riad KACED on Oct 25^th, 2009, 4:27am

Hi Glacier,

I have commented a similar topic in the following link.
http://groups.google.com/group/comp.cad.cadence/browse_thread/thread/d3646e55f0cf2b22/a5c2f0c3391db0dd

The Paper from Ken talks about the closed loop stability analysis.
This is likely to help you with a better understanding of this issue.

Cheers,
Riad.

Title: Re: stability simulation of bandgap
Post by glacieryy on Oct 27^th, 2009, 4:23am

Hi,rajasekhar
The self bias means the Gate Voltage of the Pmos used as the current bias for the amplifier is generated by the amplifier itself ,in details ,the voltage is the output of the amplifier.
In this case,can I break at the output of the amplifier ?

Regards
Glacier

Title: Re: stability simulation of bandgap
Post by glacieryy on Oct 27^th, 2009, 4:25am

Hi,Riad

Thanks for your links.

Regards
Glacier

Title: Re: stability simulation of bandgap
Post by raja.cedt on Oct 28^th, 2009, 10:36pm

hi Glacier ,
yes, you can break because breaking the loop means you are not breaking for dc only for ac signal you are breaking.are you using any start up? Hope you understand.

thanks,
rajasekhar.

Title: Re: stability simulation of bandgap
Post by aaron_do on Oct 29^th, 2009, 7:05am

Hi Rajasekhar,

can you elaborate on this point?

Quote:

one point i would like to add is break the loop where both +ve and -ve feedback are intersecting.

what do you mean by this?

thanks,
Aaron

Title: Re: stability simulation of bandgap
Post by raja.cedt on Oct 29^th, 2009, 10:10pm

hi Aaron,
what i want to convey is when you are ding stability analysis for ckts have both +ve and -ve feedback break the loop at the common point of both loop so that at a time we can break both loops.

thanks,
rajasekhar.