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Design Languages >> Verilog-AMS >> Can Verilog-AMS code be simulated in H-Spice?
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Message started by somisetty on Oct 26th, 2009, 4:14am

Title: Can Verilog-AMS code be simulated in H-Spice?
Post by somisetty on Oct 26th, 2009, 4:14am

Hi all,
Can Verilog-AMS code be simulated in H-Spice?
Thanks

Title: Re: Can Verilog-AMS code be simulated in H-Spice?
Post by Geoffrey_Coram on Oct 26th, 2009, 8:01am

HSpice, like Spectre, supports Verilog-A (analog-only subset); both Synopsys and Cadence (and other companies) have other (mixed-signal) offerings to support Verilog-AMS.

Title: Re: Can Verilog-AMS code be simulated in H-Spice?
Post by somisetty on Oct 26th, 2009, 9:09pm

Thank you

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