The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Modeling >> Behavioral Models >> veriloga problem
https://designers-guide.org/forum/YaBB.pl?num=1256588681

Message started by analogrf on Oct 26^th, 2009, 1:24pm

Title: veriloga problem
Post by analogrf on Oct 26^th, 2009, 1:24pm

Hello all,
Im making a 2x1 multiplexer. Could somebody guess the reason for these errors;

Error found by spectre during SpectreHDL compile.
"in = (V(Vsel) > vtrans) ? V(Vin2): V(Vin1)<<--? ;
Error: no discipline was specified for `Vin1'.

`include "constants.vams"
`include "disciplines.vams"

module Mux2to1(Vin1, Vin2,Vsel,Vout);
output Vout;
electrical Vout;
input Vin1, Vin2, Vsel;
electrical Vin, Vin2, Vsel ;

parameter real vtrans = 0.5;
parameter real vlow = 0;
parameter real vhigh = 1 ;
parameter real trise = 1p;
parameter real tfall= 1p;
parameter real tdel= 1p;
integer out_val ;
integer x, in;
analog begin
in = (V(Vsel) > vtrans) ? V(Vin2): V(Vin1);
V(Vout) <+ transition (vhigh*in + vlow*!in , tdel, trise, tfall);
end

endmodule

Title: Re: veriloga problem
Post by Peruzzi on Oct 26^th, 2009, 2:24pm

Typo: You said Vin instead of Vin1 when declaring electrical:

input Vin1, Vin2, Vsel;
electrical Vin, Vin2, Vsel ;

should be

input Vin1, Vin2, Vsel;
electrical Vin1, Vin2, Vsel ;

Don't feel bad. Sometimes it just takes a fresh pair of eyes to detect an error like this.

Cheers,
Bob P.
www.RPeruzzi.com

Title: Re: veriloga problem
Post by analogrf on Oct 27^th, 2009, 8:05am

oh well, thanks.

I made my circuit work without having to use it, as a way to ramp it up !

Thanks again !