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Design Languages >> Verilog-AMS >> Please provide verilogA code
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Message started by somisetty on Nov 4^th, 2009, 9:28pm

Title: Please provide verilogA code
Post by somisetty on Nov 4^th, 2009, 9:28pm

Hi all
I have the code for NAND and INVERTER gate, But i am not able to write code for whole symbol when both are connected
Please provide verilogA code of a symbol (Look at attachment for symbol).

thanks inadvance

Title: Re: Please provide verilogA code
Post by rajdeep on Nov 5^th, 2009, 2:51am

Write a top level module that instantiates these 2 modules. This is called structural way of writing a model. Please read any language manual. You can download the Verilog-A (or AMS) LRM from web or get it from the archive of this forum, may be. Look for structural way of writing models. Should not take much effort.

cheers!
Rajdeep

Title: Re: Please provide verilogA code
Post by Riad KACED on Nov 5^th, 2009, 11:22am

Hi somisetty,

From your schematic, You could have launched ADE, setup the simulator to ams and then create a netlist. This would dump a module with a structural description of your design. All what you need afterwards is to create a verilog-A view for your cell and copy past the module. Simple as that ! Besides, this forum comes with tons of eaxmples, you may serach a bit as well.

BTW, the way you are adding the Power/Ground nets into your logic cells is UGLY. We usually do not do that. You can go with 2 approaches:
1. Have Power/Ground as implicit inherited connections in a schematic views
2. Explicit inherited pins on the Spectre view.

I would go for the latter approcah.
Anyway, that was just a note ...

Cheers,
Riad.

Title: Re: Please provide verilogA code
Post by somisetty on Nov 5^th, 2009, 10:26pm

Thank you Riad KACED and Rajdeep