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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> verilog-AMS https://designers-guide.org/forum/YaBB.pl?num=1259671207 Message started by sree 4all on Dec 1st, 2009, 4:40am |
Title: verilog-AMS Post by sree 4all on Dec 1st, 2009, 4:40am hi can any one please help me on this topic " can full custom design can cope up with the challenges of language based design such as verilog-AMS", please explain this in detailed with some web links to get some information regarding this topic. |
Title: Re: verilog-AMS Post by Riad KACED on Dec 1st, 2009, 8:28am Hi, verilog-AMS is a behavioral modeling language that is very useful to validate a concept, a system before even having the transistor level building blocs. verilog-AMS is very useful to be considered in a Top-down design approach. You can also use verilog-AMS to simulate your final chip within a mixed signal environment like AMS Designer. It allows faster simulations by selecting the most appropriate abstraction level for each of the analog/digital blocs to achieve the required accuracy. So we need both. verilog-AMS can't do everything on it's own. Besides, I don't know any synthesis tool that dumps physical design out of a verilog-AMS module. So waiting for this magic tool to be invented, I can only see a bright future for Custom Design :-) As for the links, I think searching 'Behavioral modeling' and/or Verilog-AMS on the Internet would do. Cheers, Riad. |
Title: Re: verilog-AMS Post by sree 4all on Dec 1st, 2009, 10:51am [smiley=dankk2.gif]RAID KACED thank you very much for your comment in verilog-AMS i need some material upon industrial usage, applications,advantages,disadvantages and llimitation of verilog-AMS. will u please help me on this please. |
Title: Re: verilog-AMS Post by rajdeep on Dec 2nd, 2009, 3:45am You might like to read this article/paper... http://www.designers-guide.org/Design/top-down.pdf cheers! Rajdeep |
Title: Re: verilog-AMS Post by Ken Kundert on Dec 2nd, 2009, 8:02am Analog Verification uses Verilog-AMS to verify the whole SOC. This is explained in papers referenced in http://www.designers-guide.com/documents.html. -Ken |
Title: Re: verilog-AMS Post by somisetty on Dec 8th, 2009, 2:10am Hi, Can you provide verilogA code of Parallel in Serial out shift registers. Thanks inadvance |
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