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Design >> Analog Design >> MOSFET Cap biasing
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Message started by jiesteve on Dec 4^th, 2009, 9:54am

Title: MOSFET Cap biasing
Post by jiesteve on Dec 4^th, 2009, 9:54am

I am using some PMOS MOS caps in my comparator design which are used for offset cancellation (MIM caps not available in my process). I am biasing the caps in inversion region, but because of supply/headroom constraints the bias can be at the worst case around vtp or a little less.

Can I compensate for the risk of getting less capacitance by adding option caps to increase the effective area of the cap, or must I ensure my biasing has > vtp across the MOS cap?

Title: Re: MOSFET Cap biasing
Post by rf-design on Dec 14^th, 2009, 7:50pm

If the number of circuits blocks is small possible needing MIM-cap and your specification could be implemented with MOS-caps you should stay with MOS-cap.

Typical you should design both circuit options with a possible different dimensioning. The you could compare and decide.

MOS-caps are restricted in voltage range related to supply for a given nonlinearity. The second drawback is that the only one electrode is free. The bottom electrode can have 30% parasitic capacitance. So that limit the range of circuit topologies. But for offset correction storage I think it is useable.