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Simulators >> Circuit Simulators >> Cadence PLL Simulation Issues
https://designers-guide.org/forum/YaBB.pl?num=1260503106

Message started by qiushidaren on Dec 10^th, 2009, 7:45pm

Title: Cadence PLL Simulation Issues
Post by qiushidaren on Dec 10^th, 2009, 7:45pm

Dear all,

I met some issues when I try to simulate a PLL circuit, I don’t know what’s going on, could you help me, thank you in advance.

Here are the issues below:
1.Could not save cellView pll passive_flfr schematic
dbsave: Failed to save cellView (passive_flfr schematic) Disc quota exceeded.
2.Warning from spectre during initial setup.
I0.I0.M0: Parasitic resistor ‘rs’ has been deleted because its value of 404.762 uohm (R/MFactor) was smaller than ‘minr’.
I0.I0.M0: Parasitic resistor ‘rs’ has been deleted because its value of 404.762 uohm (R/MFactor) was smaller than ‘minr’.

-Terry

Title: Re: Cadence PLL Simulation Issues
Post by sheldon on Dec 11^th, 2009, 7:55am

Terry,

Have you checked disk space?

dbsave: Failed to save cellView (passive_flfr schematic) Disc quota exceeded.

Best Regards,

Sheldon