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Design Languages >> Verilog-AMS >> Import VHDL test bench in Virtuoso AMS
https://designers-guide.org/forum/YaBB.pl?num=1261576548

Message started by fran2k5 on Dec 23^rd, 2009, 5:55am

Title: Import VHDL test bench in Virtuoso AMS
Post by fran2k5 on Dec 23^rd, 2009, 5:55am

Hi,

I would appreciate your feedback on the following issue.

We would like to verify a MS chip in Virtuoso AMS.
The digital part has been developed by using VHDL test benches.
Is it possible to import such test benches in Virtuoso AMS?

Best regards,

frank

Title: Re: Import VHDL test bench in Virtuoso AMS
Post by Andrew Beckett on Jan 6^th, 2010, 10:19am

Absolutely. The simulator itself would have no problem with this. But it's unclear what you mean by "import". You could create a VHDL view, with the testbench code, and then create a symbol for it and wire it up to the DUT - it's really hard to tell without knowing precisely how you have things structured.

Or you could simulate the code from the command line?

Unfortunately the more I type here, the less I think I'm helping ;-)
The issue is that without knowing precisely what you're trying to achieve, and how the testbenches are structured, it's very hard to give a precise answer (see the Forum guidelines and Ken's post http://www.designers-guide.org/Forum/YaBB.pl?num=1252743617

Regards,

Andrew.

Title: Re: Import VHDL test bench in Virtuoso AMS
Post by fran2k5 on Jan 13^th, 2010, 12:48pm

Thank you Andrew for your reply.

I've recently discovered the existence of the Spice-VHDL flow that allows the simulation of MS systems by using test-benches developed in VHDL.
This flow is based on the use of tools like SimVision typically used in the digital design flow. I was wondering if it would be possible to perform the same simulations in the Cadence AMS environment by importing somehow the VHDL test-benches.

Best regards,

frank

Title: Re: Import VHDL test bench in Virtuoso AMS
Post by Andrew Beckett on Jan 16^th, 2010, 8:07am

What SPICE-VHDL flow are you talking about?

As I said, doing all this with the Cadence AMS Designer simulator will be no problem; I just don't know what you mean by "import", as I said before. Your response didn't really provide any more clarification... (sorry!)

Regards,

Andrew.