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Design >> RF Design >> Practical impedance matching
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Message started by aaron_do on Feb 22^nd, 2010, 12:16am

Title: Practical impedance matching
Post by aaron_do on Feb 22^nd, 2010, 12:16am

Hi all,

I recently designed an RF front end where for the first time, the circuit was packaged and soldered onto a PCB for testing. The chip is functioning but the sensitivity is significantly poorer than expected. I believe it is because of the input matching.

The relection coefficient is vastly (very, very, very) different from what I expect. Furthermore, if I calibrate my network analyzer up to the PCB SMA connector it is vastly different fom if I calibrate up to the SMA coaxial cable.

I tried implementing a rudimentary LC matching network on the board, but for various reasons it has been extremely troublesome trying to match the load. Furthermore, i'm not sure if it is even better to get a good match. Here's why:

1) the network in between the device and the sig gen contributes several dB of loss (maybe 5 dB including a balun, the coax cables, and other board components). This loss can be treated as a different load from the desired load (the chip).

2) Based on the above, if I do impedance matching, how do I know that maximum power delivered by the sig gen results in the maximum power delivered to the chip?

So here is my question. Can anybody give me some practical advice on what I can do at this point. The only thing I can think of is to just use trial and error until I get the best possible network.

Also for the next time I do this, does anybody have any recommendations? I suppose I need to model my PCB circuits, boding wire, and transmission line properly and take it into account in the design.

thanks,
Aaron

Title: Re: Practical impedance matching
Post by aaron_do on Feb 22^nd, 2010, 5:26am

Quote:

Furthermore, if I calibrate my network analyzer up to the PCB SMA connector it is vastly different fom if I calibrate up to the SMA coaxial cable.

ok i kind of get this part, so now my only question is:

If I have multiple loads how do I ensure the maximum power is delivered to one of the loads? Do I just match the circuit and assume maximum power delivered by generator means maximum power delivered to the desired load?

thanks,
Aaron

Title: Re: Practical impedance matching
Post by RFICDUDE on Feb 26^th, 2010, 3:13am

I think the answer is that you must make sure that even with lossy components that a match is maintained from the desired load to the final match.

What I mean is that you have an expectation of what the impedance is at the desired load, the components in between and the final matching network (I assume). If either the input impedance is not what you expected or if the balun/board components are not correct then the impedance will not be what you expect it to be at the point where the system should be matched to 50 ohms.
If this is the case, then you can tweak the matching network to match the input to 50 ohms, but the final load is still mismatched. You may have difficulty doing this if there is any significant length of transmission line between the matching network and where you are measuring the return loss. The tline transforms (rotates) the impedance from where the match is so it is difficult to make intuitive guesses as to which way to move the component values unless you account for the impedance transformation of the tline.

So, what to do?

The best thing to do (if you can) is to verify everything is what you expect it to be.
- try to measure the input impedance of the DUT (usually have to use a launch off the board using a small piece of semiridgid coax with a sma on the end)
- try to measure the in between network or components to verify they are correct
- when tweaking the match, try to measure the impedance right at the matching network or use a simulator to try and de-embed the tline transformation between the match and where you are measuring the impedance
- try to characterize any transmission lines on the board. Usually this is done by putting a few extra connectorized tlines on the test board just for measuring the line characterisitcs. Although, I have also seen it done by taking blank boards and using small semiridgid sma launches to measure individual lines on the board.

I guess the message is that you can't answer your question without verifying where the match went wrong starting with the DUT and then working your way back to the matching network. I have seen cases where the input impedance was significantly off from what was expected because of feedback on the die (high voltage gain to a tuned load coupling back to degeneration inductor) or because the packaging parasitics were different from what was expected.

-RFICDUDE