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Design Languages >> Verilog-AMS >> future of analog verification
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Message started by rampat on Mar 2^nd, 2010, 12:08am

Title: future of analog verification
Post by rampat on Mar 2^nd, 2010, 12:08am

Hi
what is the future of analog/AMS verification ?
If given a chance is it advisable to change domain from analog design to analog verification ?

thanks

Title: Re: future of analog verification
Post by Andrew Beckett on Mar 2^nd, 2010, 4:31am

Over the last few years I've seen a gradual increase in the number of people who are specializing in Analog/Mixed-Signal Verification, as a separate activity from design.

In the digital world, there's a recognition that design and verification are different tasks, each with their own specialities and expertise.

There's a growing recognition that having similar disciplines for Analog/Mixed-Signal verification is useful and indeed desirable. Knowing how to verify a mixed-signal system efficiently and accurately is a different skill-set than doing the design in the first place. Often the designer is too close to the design to be able to effectively verify it (not always, and some designers are very good at this, but having a more formal approach to verification does not always come naturally to many analog designers).

I'm sure Ken and Henry would concur with this, as this is (I believe) a cornerstone of their consultancy.

Languages such as Verilog AMS and VHDL AMS are empowering this kind of verification, as are tools such as ADE XL, which is encouraging a more specification-driven approach to verification.

That said, there are still a lot more people doing design than analog/mixed-signal verification.

Regards,

Andrew.