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Design Languages >> Verilog-AMS >> Prefix adders
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Message started by akhil on Mar 6^th, 2010, 10:30pm

Title: Prefix adders
Post by akhil on Mar 6^th, 2010, 10:30pm

I plan to design a 64 bit Brent Kung adder..
While writing the verilog code , I had a doubt as i have the code for the 16 bit Brent Kung ..can the 16 bit module be used to design a 64 bit adder or should it be done seperately ..
as in would it affect the speed of the adder ?

Secondly, can i get a pictorial representation of the 64 bit brent kung adder because it becomes easy to code it

Title: Re: Prefix adders
Post by Marq Kole on Mar 8^th, 2010, 6:59am

Hi,

This is the section for Verilog-AMS, so that's the mixed-signal extensions to Verilog. Although Verilog 1364-2008 is a full subset of the Verilog-AMS 2.3.1 language, I think you will find that the people that could answer your question normally do not visit this forum.

Cheers,
Marq