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Design >> Mixed-Signal Design >> doubts about esd
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Message started by refugee on Mar 7th, 2010, 11:47pm

Title: doubts about esd
Post by refugee on Mar 7th, 2010, 11:47pm

hi guys,
i have some doubts about esd, would you plz be so kind to help me out.
1. which one is more sensitive to esd?  oxide or diffusion
2. why we need to protect the drain of nmos to vin, but not the source of pmos?
3. when using ggnmos,  suppose there is an zap from input pin to ground, which mechanic is occurred? does parasitic bjt of the nmos discharge the esd charge or the nmos has been turned on? ( because we usually add a resistor between the gate and ground)

Title: Re: doubts about esd
Post by Seeker on Apr 2nd, 2010, 10:09am

My two cents.

Usually the oxide is more sensitive. So, the GS and GD overlap oxide is the first to pop in an ESD event.

You need to explain your second question more. I can't understand.

The event that results in a GGNMOS during ESD is called snapback. (Please consult some ESD books for discussion). Although the I-V curves are well understood (like an SCR), the exact mechanism at the carrier level is still open to debate). Adding a resistor between gate and ground helps the device snapback at a lower voltage, which is why it is done.

Title: Re: doubts about esd
Post by Dan Clement on Apr 13th, 2010, 9:55pm


refugee wrote on Mar 7th, 2010, 11:47pm:
hi guys,
i have some doubts about esd, would you plz be so kind to help me out.
1. which one is more sensitive to esd?  oxide or diffusion
2. why we need to protect the drain of nmos to vin, but not the source of pmos?
3. when using ggnmos,  suppose there is an zap from input pin to ground, which mechanic is occurred? does parasitic bjt of the nmos discharge the esd charge or the nmos has been turned on? ( because we usually add a resistor between the gate and ground)


For #1, It's not so easy to answer...  Gate oxide is pretty robust to high voltages for very short times, within reason of course.  Diffusion can also be robust as long as the thermal effects when in breakdown don't destroy the junction.

For #2, I think you have probably seen that nmos require stricter ESD rules than pmos.  The simple reason is that the mobility differences make the nmos the weaker of the two devices for ESD so more focus is on protecting them.

For #3, The ggnmos is a combination of both the parasitic npn transistor from drain/bulk/source and the nmos channel.  The cgd of the device charges the gate during ESD and the resistor helps to raise the gate voltage to get a channel formed, which increases the current being dumped into the npn, making it easier for it to snapback.

Title: Re: doubts about esd
Post by thechopper on Apr 22nd, 2010, 6:09pm

What Seeker pointed out about snapback is correct. Let me clarify such snapback is associated to the parasitic bipolar in parallel with the MOS channel (i.e. drain-bulk-source) and not the MOS channel.
Snapback condition is reached only at a certain voltage AND current levels. The NPN base (bulk) is pushed out into the collector occupying the original depletion region of the base-collector junction. When this happens suddenly the carrier concentration increases and the amount voltage to stand such current level is much lower than before --> that is what is called snapback.
This condition is reversible and presents a very low dynamic impedance, which is what actually protects the circuitry hanging from such pin.

Best
Tosei

Title: Re: doubts about esd
Post by thechopper on Apr 22nd, 2010, 6:13pm


Dan Clement wrote on Apr 13th, 2010, 9:55pm:
For #1, It's not so easy to answer...  Gate oxide is pretty robust to high voltages for very short times, within reason of course.  Diffusion can also be robust as long as the thermal effects when in breakdown don't destroy the junction.


Hi Dan,

Although what you suggested is essentially true for the gate oxide lots of successive events (even those very short time ones) might create a gradual degradation to the oxide which might not show up as  fully damaged oxide but a barely leaky one. Some cases this is not acceptable either.

Best
Tosei

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