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Design Languages >> Verilog-AMS >> Running average in Verilog-AMS
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Message started by Cri Azzolini on Apr 14^th, 2010, 7:15am

Title: Running average in Verilog-AMS
Post by Cri Azzolini on Apr 14^th, 2010, 7:15am

Hi all,

is there a method to calculate running averages in Verilog-AMS? I would need to measure the running average of a voltage with a time window of TS second. So that the expression in pseudo-math language would be:

avg = 1 /TS * integral_from($asbtime-TS)_to($abstime) vin(x)dx

where $abstime is the running time.
As model output I would need a time continuous function: avg(t).
I am not sure if the VerilogAMS function "idt" is suitable.

Any ideas?

Many thanks,
Cristiano

Title: Re: Running average in Verilog-AMS
Post by Andrew Beckett on Apr 14^th, 2010, 4:40pm

There's an example of doing this on the Cadence Online Support site http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;solutionNumber=11277434

If that helps...

Andrew.

Title: Re: Running average in Verilog-AMS
Post by Marq Kole on Apr 19^th, 2010, 7:54am

In case you are not able to see the answer at the Cadence support site, the answer to your question is: yes, idt is applicable, but you also need to factor in the time window. You can rewrite the integral to the following form:

avg = 1 /TS * integral_from($abstime-TS)_to($abstime) vin(x)dx

avg = 1 /TS * (integral_from(0)_to($abstime) vin(x)dx -
integral_from(0)_to($abstime-TS) vin(x)dx)

avg = 1 /TS * (integral_from(0)_to($abstime) vin(x)dx -
integral_from(TS)_to($abstime) vin(x-TS)dx)

avg = 1 /TS * (integral_from(0)_to($abstime) vin(x)dx -
integral_from(0)_to($abstime) vin(x-TS)dx)

avg = 1 /TS * integral_from(0)_to($abstime) (vin(x) - vin(x - TS))dx

Now you can use idt() and a delay operator to implement this transformed operation.

Marq

Title: Re: Running average in Verilog-AMS
Post by Cri Azzolini on Apr 20^th, 2010, 2:53am

Hi Marq and Andrew,

many thanks for the precious hints.
I'll proceed as suggested!

Bye,
Cristiano

Title: Re: Running average in Verilog-AMS
Post by Cri Azzolini on Apr 20^th, 2010, 4:17am

Hi again,

I just googled this thread with a skill code by Andrew:

http://groups.google.com/group/comp.cad.cadence/browse_thread/thread/bc276d85b43cafa0/45447edc7dd69616?lnk=raot

I also tried the VerilogAMS code suggested by Marq and they seems quite similar. Actually there is a small discrepancy between the results of the two methods but in my case this may be probably accepted.

Thanks,
Cristiano