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https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> help with proper NF simulation in Cadence https://designers-guide.org/forum/YaBB.pl?num=1271281075 Message started by msmahani on Apr 14th, 2010, 2:37pm |
Title: help with proper NF simulation in Cadence Post by msmahani on Apr 14th, 2010, 2:37pm Hello All I am simulating a mixer in cadence and for measuring its NF I am using PSS+PNOISE. in Pnoise setting, for setting input and output we have options of voltage source and probe for output. The former option takes into account the noise added by port's internal resistor itself while the latter does not. The results differ by 3-4 dB which is higher for the voltage source. I tried the PNOISE analysis for a simple Pi type resistive attenuator and compared the results of both cases with noise analysis in SP. PNOISE simulation results with Probe option for output coincides with NF from SP. Now My question is which one is correct or which will be seen during the measurement? Thanks, Mohammad |
Title: Re: help with proper NF simulation in Cadence Post by Andrew Beckett on Apr 14th, 2010, 4:28pm You should use pnoise with a probe as the output, pointing at the port. The whole point is that the port is part of the measurement equipment (think of how you'd do the measurement on the bench), and so the noise produced by the termination is not part of the noise in the circuit. Similarly, the noise produced by the input port is at whatever temperature is set on the port via the noisetemp parameter - rather than what the simulation temperature is. That's because the input port is not on the chip, and so wouldn't be at the same temperature as the chip - it should be producing a known amount of noise.. Using a voltage as the output for pnoise is fine if you are computing noise figure, and there's nothing in the circuit which represents the loading of the "probe" - maybe you have a voltage rather than power output. It's also OK if you're not computing noise figure, but (say) output noise. Not really a design issue - would have made more sense in the RF simulation board. Hope that helps, Regards, Andrew. |
Title: Re: help with proper NF simulation in Cadence Post by msmahani on Apr 16th, 2010, 2:09pm Hi Andrew Many thanks, you helped a lot. I am not sure about what you mean by "and there's nothing in the circuit which represents the loading of the "probe". do you mean that I shouldn't consider the effect of loading of a real prob when I am simulating Noise with voltage output? Regards, Mohammad |
Title: Re: help with proper NF simulation in Cadence Post by Ken Kundert on Apr 16th, 2010, 2:59pm When computing noise figure the simulator treats the noise generated by the circuit differently than the noise generated by the testbench. As such, you must describe the testbench in a way that the simulators actually recognizes it as the testbench. The easiest way of doing that is to use ports for input driver and output load and inform the simulator which is the input port and which is the output load. The easiest way of confirming that you are getting the right results is to simulate a passive attenuator. The noise figure should equal the amount of attenuation (a 6dB attenuator should have a 6dB noise figure). -Ken |
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