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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Pole analysis differ from theory https://designers-guide.org/forum/YaBB.pl?num=1273302986 Message started by casual on May 8th, 2010, 12:16am |
Title: Pole analysis differ from theory Post by casual on May 8th, 2010, 12:16am I built common source amplifier by using a single nmos transistor with ideal 1k ohm load (Rd), bulk tied to ground (no body effect). Bias Vgs at around 0.7V and do AC simulation & pz analysis width = 10um x 4 finger ; length=0.18u ; vdd=1.8V Result from pz analysis Pole1=-4.582GHz Zero1=70.72GHz AC measurement: Av_DC=17.49dB Av_DC=7.486 V/V 3dB_BW=4.753GHz Extracted intrinsic cap of the nmos gm=8.791m Cdg=-19.78f Cdb=-2.23f Cds=11.28f Csg=-26.51f Csb=-3.342f Csd=-23.11a ~0 Css=29.88f Cdd=10.73f Cgg=49.37f Cgd=-10.72f Cgs=-33.81f Cgb=-4.849f From theory, Av_DC=gm*Rd=8.791m*1k=8.791 vs simulated 7.486 poles=1/(2*pi*Rd*(Cdg+Cdb)=1/(2*pi*1k*(19.78f+2.23f))=7.23GHz vs simulated pz analysis=4.582GHz (huge difference) 3dB_BW = 4.753GHz I try to relate simulation result with theory. If back calculated from pz analysis Cload=1/(2*pi*f*Rd)=1/(2*pi*4.582GHz*1k)=34.73fF which is very near if Cload=Cdg+Cdb+Cds=19.78f+2.23f+11.28f=33.29f however Cds is different sign with Cdg+Cdb... Hope someone can clarify it... it should be simple...but cant reach it.. |
Title: Re: Pole analysis differ from theory Post by casual on May 8th, 2010, 12:19am Does overlap capacitance Cgdovl factor into the Cgd and Cgsovl factor into Cgs? |
Title: Re: Pole analysis differ from theory Post by pancho_hideboo on May 8th, 2010, 3:41am What simulator do you use ? Do you use Synopsys HSPICE which is "Golden Standard Simulator" ? The followings are general notes for you. - Always describe correct tool's name and vendor's name which you use as tool or simulator. - Don't do multiple posts which are same content. - Don't request source code or behavioral model without any efforts. - There are many simulators which have analyses called as PSS, PAC and Pnoise. - Describe in detail with using correct terminologies. - Warnigns are different from Errors. - ADS is not name of simulator. - There is no tool which name is Cadence. - Don't use Direct Plot of Cadence ADE blindly without knowing definition. - All gains in Direct Plot of Cadence ADE are "right", "true" and "practical" voltage gain. - Don't mix up Simulation with Post Processing. They are completely different phase. - MATLAB are different from Simulink. - Learn measurements using actual instruments. Not "EDA Tool Play |
Title: Re: Pole analysis differ from theory Post by casual on May 8th, 2010, 3:56am using Cadence, spectre simulator. (do not have synopsys, Yes i know HSPICE is golden standard) Is the discrepancy because of the PDK accuracy? I am not sure. Because I found weird BW result in other circuit. That's why i constructed a simply testcase, common source amplifier Av_DC_dB --> value(dB20((VF("/out") / VF("/vgs"))) 1 ?histoDisplay nil ?noOfHistoBins 1) Av_DC --> mag(value((VF("/out") / VF("/vgs")) 1 ?histoDisplay nil ?noOfHistoBins 1)) 3dB_BW --> bandwidth((VF("/out") / VF("/vgs")) 3 "low") where vgs is input with small signal acm=1mV, out is output node the gm & Cxx are obtained from OP (in dc) |
Title: Re: Pole analysis differ from theory Post by pancho_hideboo on May 8th, 2010, 7:20am I think result of Cadence Spectre PZ analysis is reasonable. Maybe there are some issues in interpretation of results of DC operation point information. |
Title: Re: Pole analysis differ from theory Post by casual on May 8th, 2010, 7:26am pz result is almost same with AC response curve. The thing i doubt is the extracted capacitance by using OP the values seems smaller... could someone compare those extracted cap with other simulator or foundry in 0.18um technology? |
Title: Re: Pole analysis differ from theory Post by casual on May 8th, 2010, 7:34am one more query, why Cds is not counted in freq analysis. source is grounded, so Cds can be part of the load at drain load. I have checked few textbooks, Cds is not counted. Is it because it is too small? |
Title: Re: Pole analysis differ from theory Post by casual on May 9th, 2010, 8:25pm Found out that Cds splits into Cgb, Csb, Cdb... therefore Cds is not counted since Cdb is already taken in. |
Title: Re: Pole analysis differ from theory Post by raghu_n_ch on May 25th, 2010, 7:52am Are you accouting for device rds. There will be miller multiplication of the cap Cdg depending on the gain, this also needs to be considered. |
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