The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> VCO 1/f^3 noise and LPF with 1MHz BW https://designers-guide.org/forum/YaBB.pl?num=1274188115 Message started by casual on May 18th, 2010, 6:08am |
Title: VCO 1/f^3 noise and LPF with 1MHz BW Post by casual on May 18th, 2010, 6:08am the 1/f^3 noise (<100kHz) of a VCO becomes less important if it uses in a PLL with large LPF BW >1MHz. It is because VCO noise to output of PLL (transfer function of VCO noise) is a high pass filter (HPF) relationship. In other words, the 1/f^3 will be filtered out by the LPF. Is this statement true? PS: the LPF is a 2nd order type. |
Title: Re: VCO 1/f^3 noise and LPF with 1MHz BW Post by ywguo on May 19th, 2010, 5:39am Hi Casual, I think that statement is true. Please try to model it with verilog-A or matlab and simulate. Yawei |
Title: Re: VCO 1/f^3 noise and LPF with 1MHz BW Post by casual on May 19th, 2010, 6:10am why there are so many papers trying to reduce the 1/f^3 noise? Is it because the PLL LPF BW they used are <<1M Hz? especially in freq synthesizer.. |
Title: Re: VCO 1/f^3 noise and LPF with 1MHz BW Post by Mayank on May 20th, 2010, 7:15pm Quote:
For Integer PLLs, toi keep a Loop BW of 1MHz, assumnig you want to design with Gardener's principle, your Fref or Fcomparison should be more than 10MHz ateast. XOs generally come with haphazard frequencies like 9.6 MHz / 13 MHz, etc. in which case you need to divide down the reference freq. to an integer division of output freq. This reduces your Fref & hence you max PL BW spec. For fractional PLLs, to control the S-D noise from dominating the output, PLL BW has to be kept low. Freq Synthesizers can be based on both Integer as well as Fractional PLLs. SO their BW is genearlly low, but it can go above 1 MHz. This should not be the only explanation to your original question. Gotta think a bit more. Maybe on the lines that Flicker Noise causes Random Walk in PLLs. -- Mayank |
Title: Re: VCO 1/f^3 noise and LPF with 1MHz BW Post by Mayank on Jun 4th, 2010, 4:22am Quote:
Researched. This is indeed the only reason we keep 1/f^3 corner low for an oscillator. PLL BWs of around 1MHz and above are diff. to design because FREFs at High Frequencies are not easily available. Also, if you PLL Operating Frequency doesnt turn out to be an integer multiple of FREF, you gotta divide down FREF further, making it even more diff. for PLL BW to be higher than 1/f^3 corner. That's the sole reason everyone tries to keep 1/f^3 corner LOW enough. -- Mayank. |
Title: Re: VCO 1/f^3 noise and LPF with 1MHz BW Post by casual on Jun 4th, 2010, 4:36am Thank you. :) |
The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. |