The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design Languages >> Verilog-AMS >> how to model the PSRR of a voltage reference
https://designers-guide.org/forum/YaBB.pl?num=1274210660

Message started by mowiehowie on May 18^th, 2010, 12:24pm

Title: how to model the PSRR of a voltage reference
Post by mowiehowie on May 18^th, 2010, 12:24pm

Hi all

I've been trying to model the PSRR of a voltage reference without sucess. Has anyone, here, done it before ?

I've got an ouput voltage that is taken from a look-up table, and need to add an equation taking into account the variations on the power supply. The PSRR is 40dB, i.e, any variations on the power supply will reflect at the output, attenuated by a factor of 100.

I've tried heaps of different ways and just couldn't make it. Need some help. Thank you.

Title: Re: how to model the PSRR of a voltage reference
Post by mowiehowie on May 18^th, 2010, 2:05pm

Well, I made it up by adding a capacitor branch (c1,c2) that will be charged with 0.01*vdd and adding this branch voltage to the output, so this way it will ignore the DC level of the power supply, taking into account only the variations.

I'm not sure it's a good approximation though.

Title: Re: how to model the PSRR of a voltage reference
Post by Marq Kole on May 19^th, 2010, 7:27am

The model you created will have a 1/f transfer function if it really is a capacitor. I would expect PSRR to be a frequency dependent value in which case you could also try to model it using a laplace_* function, as long as it has a pole at s=0 to decouple the DC levels.

Cheers,
Marq