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Design Languages >> Verilog-AMS >> Noise
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Message started by brenox on May 27^th, 2010, 3:28pm

Title: Noise
Post by brenox on May 27^th, 2010, 3:28pm

I'm trying to insert a white noise in a LNA description but it is always null.

Here is the way I'm trying to insert the noise:

V(Noise) <+ white_noise(4*$temperature, "white noise");

Or something else with many other variations: constants, variables, etc, in the white_noise command.

The value when I simulate is always zero. Someone could help me generating an white noise?

Title: Re: Noise
Post by patrick on May 27^th, 2010, 4:22pm

Maybe it's the analysis type you are using? You will only see the noise contribution in small signal analyses, see LRM 2.3 page 81.

Title: Re: Noise
Post by Peruzzi on May 27^th, 2010, 7:00pm

Hello Brenox,
Are you trying to add noise to a Verilog-AMS model for transient simulations? If so, you can create a noise generator model to inject voltage or current noise in a model. Doing so is quite useful for exploring noise propagation in nonlinear systems such as RF mixers, switched-capacitor filters or delta-sigma A/D converters.

The key is to create a pseudo-random stream of real numbers at a sample rate much higher (about 20x higher) than the maximum frequency of interest. You may then filter that stream as desired, then scale and assign it to a voltage or current.

You may contact me directly for more details or clarification.

Cheers,

Bob Peruzzi
www.RPeruzzi.com

Title: Re: Noise
Post by David Lee on May 30^th, 2010, 5:02pm

Hi Brenox,

To turn on white noise in Verilog-A in a transient simulation, use BDA's Analog FastSPICE Transient Noise. All you need is to add the noisefmax parameter to the regular transient analysis statement. Transient noise and AC noise should match above the SPICE noise floor.