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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Is the bandgap vref still insensitive to process and power supply voltage? https://designers-guide.org/forum/YaBB.pl?num=1276065946 Message started by newic on Jun 8th, 2010, 11:45pm |
Title: Is the bandgap vref still insensitive to process and power supply voltage? Post by newic on Jun 8th, 2010, 11:45pm Bandgap reference design is to combine Vbe and K*Vt to generate a voltage reference that is insensitive to temperature. Vref=Vbe+K*Vt Is the bandgap vref still insensitive to process and power supply voltage? The resistor has +/-20% variations and power supply 10% |
Title: Re: Is the bandgap vref still insensitive to process and power supply voltage? Post by papodu on Jun 24th, 2010, 11:44pm No, its not. It is always required to correct the drift in Temp-Co due to process variation, so as to get temperature independent(to first order) Vref. It can be a trim circuit. Regards, N S |
Title: Re: Is the bandgap vref still insensitive to process and power supply voltage? Post by RobG on Jun 25th, 2010, 8:54am Just to expand a bit. The bandgap output voltage is (ideally) VOUT = UT*ln(IBE/IS) + K*UT where UT is our friend kT/q and K is a gain ~8 K is determined by ratios so it is process independent. UT is determined by your favorite God, and he/she doesn't appear to have plans for changing it, so count that as process independent. IBE is the current in the relevant PN junction -- it is process dependent. Generally it is limited by the sheet resistance of your process: +/-30% or so, plus the temp co of the resistors. The temp co can increase or decrease the curvature of the temp response. IS is the saturation current (reverse bias leakage) and is +/- 30% or so over process if you have a lazy fab. (IMO it is very well controlled, much better than +/-30%, like the Nwell resistor). So your process dependent part of the equation is UT*ln(IBE/IS) and the variables are tempered by the ln function. There are other non-ideal effects, like base current drop across the base resistance. These can be strongly process dependent and need to be designed around. Power supply rejection is just a matter of shielding the pn junction and its current from power supply variations. |
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