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Design >> Analog Design >> Stable Iref across PVT
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Message started by newic on Jun 9^th, 2010, 2:33am

Title: Stable Iref across PVT
Post by newic on Jun 9^th, 2010, 2:33am

Want to generate a stable across PVT Iref to opamp and other circuits.
What are the alternative?

Bandgap reference Vref?
However, it is still sensitive to Vdd unless voltage regulator is used, right?

The generated Vref from bandgap is stable across temperature (Vref variation=+/-0.5%). However, when converting vref to current Iref, the Iref becomes sensitive to temperature due to Vt variation, resulting in about +/-5% Iref variation or total 10%.

Any guidance?

Title: Re: Stable Iref across PVT
Post by XY-oriented on Jun 9^th, 2010, 2:39am

I would say +/-5% is pretty decent ... your design should be robust enough to stand 10% bias current variation.
any circuit that can´ t stand +/-10% bias variation is a bad one in my opinion.

Title: Re: Stable Iref across PVT
Post by newic on Jun 9^th, 2010, 2:42am

that is just the temperature variation.
it does not account for the process and voltage variations.

Title: Re: Stable Iref across PVT
Post by XY-oriented on Jun 9^th, 2010, 3:02am

then you should think of trimming your bandgap so to limit process variation to +/-5%

Title: Re: Stable Iref across PVT
Post by AnalogDE on Jun 9^th, 2010, 9:16am

Just curious, how are you doing a BGVref to Iref conversion?

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 9^th, 2010, 9:27pm

For Temp,
Instead of making a BGap Voltage Reference, generate a Zero Temp. Coefficient Current from BandGap Core.
For Process,
Trim BG resistors to get desired current value.
For Voltage,
Keep PSR of the Loop High Enough. V variation should not be a problem then.

Result : - You get A Current Ref. independent of PVT variation.

--
Mayank.

Title: Re: Stable Iref across PVT
Post by newic on Jun 9^th, 2010, 11:56pm

Hi Mayank,

it makes sense to make deriv_Iref/deriv_temp = 0 instead of deriv_Vref/deriv_temp = 0.

what if I need both Vref & Iref independent PVT?

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 10^th, 2010, 1:11am

Quote:

Hi Mayank,

it makes sense to make deriv_Iref/deriv_temp = 0 instead of deriv_Vref/deriv_temp = 0.

what if I need both Vref & Iref independent PVT?

Use Different Circuits. That's the Common practice

Title: Re: Stable Iref across PVT
Post by newic on Jun 10^th, 2010, 9:59pm

Use BG Vref to convert to Iref.
Is it a common practice?

Title: Re: Stable Iref across PVT
Post by newic on Jun 10^th, 2010, 11:53pm

how to trim the resistor?

adding a fuse? (resistor that parallel with a transistor)

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 11^th, 2010, 12:02am

Quote:

Use Different Circuits. That's the Common practice

Be advised.
If you want to use BG_VREF to create I_REF, it is difficult to get exact temperature compensation, leave alone process. For BG_VREF / Res technique, you require Res. trimming to eliminate process variation.

Better Sol. --
Build a BG_VREF BandGap Circuit with Zero Temperature Coefficient Voltage. (Generally, PTAT current * CTAT resistance = ZTC voltage)
Build another IREF BandGap Circuit with Zero Temp. Coeff. CURRENT, not ZTC voltage. (Generally, CTAT current +PTAT current= ZTC current )

Then apply trimming after fab to get precise PVT compensated VREF & IREF.

--
Mayank

Title: Re: Stable Iref across PVT
Post by newic on Jun 11^th, 2010, 12:13am

Thank you very much!
:)

Title: Re: Stable Iref across PVT
Post by newic on Jun 15^th, 2010, 10:16pm

Quote:

Build another IREF BandGap Circuit with Zero Temp. Coeff. CURRENT, not ZTC voltage

What is the normal current value in the bandgap core and Iref?

Normally the core current is very small <50uA. I read from papers, is it true? will it suspectible to interference?

How about Iref value as a global current distribution.

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 16^th, 2010, 2:41am

Quote:

What is the normal current value in the bandgap core and Iref?

Inside BGR core -- < 50uA
Inside Current References core -- < 100uA

Quote:

Normally the core current is very small <50uA. I read from papers, is it true? will it suspectible to interference?

Current being small is true. Layout of these blocks is done with extreme care which takes care of averting susceptibility to substrate noise, etc.

Quote:

How about Iref value as a global current distribution.

As raja quoted somewhere, dont keep current multiplication ratios bigger than 100x. It increases the noise in the current.

--
mayank.

Title: Re: Stable Iref across PVT
Post by RobG on Jun 16^th, 2010, 2:12pm

Mayank wrote on Jun 11^th, 2010, 12:02am:

Quote:

Use Different Circuits. That's the Common practice

FWIW, you can do it with just a voltage source and a ZTC resistor. if you don't have a ZTC Resistor available you can create one by using two resistances of opposite temp co. You also get less process variation using two resistances, assuming they are statistically independent. For giggles I wrote up a paper on how to do it and maintain the same temp co even if the two sheet resistances change in opposite directions. http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.76.2458&rep=rep1&type=pdf

But like you say, the big issue is the variation in sheet resistance, which you will need to trim out or use an external resistor.

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 16^th, 2010, 9:04pm

Agree with RobG here.
But in VBG / Rztc, it's difficult to obtain compensated umbrella across Process Corners.
In BGR Core ZTC Iref Generation, the umbrella shape is more or less preserved across Process Corners.

Title: Re: Stable Iref across PVT
Post by newic on Jun 19^th, 2010, 8:47pm

it is nice to cancel out the positive TC (PTC) resistor with negative TC (NTC) resistor to get independent temperature.

However, the process variation of these two resistors might be different. Unless both the PTC & NTC resistors are the same type (poly type) BUT poly resistors are PTC type.

Title: Re: Stable Iref across PVT
Post by newic on Jun 19^th, 2010, 8:54pm

Quote:

Inside BGR core -- < 50uA
Inside Current References core -- < 100uA

Could you explain these BGR core & Current references core.
I think i might be confused.

It is great if the pictures or papers are shown.

Title: Re: Stable Iref across PVT
Post by Mayank on Jun 20^th, 2010, 10:53am

Typical BGR core consists of a normal ΔVBE + VT*ln(n) compensation.
or in other words, VBE1 = VBE2 + Iptat*R.

Typical Current Reference Core, includes extra Resistance arms connected in parallel with the branches of a BGR core to provide CTAT current, which then adds up with PTAT current generated by the BGR core, thus providing ZTC current.

Pls. Refer Voltage References by Gabriel Rincon Moora.

--M

Title: Re: Stable Iref across PVT
Post by RobG on Jun 20^th, 2010, 9:26pm

newic wrote on Jun 19^th, 2010, 8:47pm:

Actually not necessarily true about the process variation... read the paper I referenced. It shows how to make composite resistors so that the independent sheet resistance variations do not affect the overall temp co of the composite resistance.

rg

[edited to clarify]