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https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> Phase Noise of Δ-Σ modulators https://designers-guide.org/forum/YaBB.pl?num=1276575200 Message started by Mayank on Jun 14th, 2010, 9:13pm |
Title: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 14th, 2010, 9:13pm I have read many papers on ΔΣ modulator design & they depict phase noise plots for 2nd, 3rd & 4th order modulation. How do they obtain those phase noise plots for ΔΣ modulators ? Solely through MATLAB models or from SPICE simulation ?? |
Title: Re: Phase Noise of Δ-Σ modulators Post by ipyd on Jun 15th, 2010, 5:52am Hi Mayank, I've never done it before. But, I guess, they save all simulation SPICE results and then plot it using MATLAB code. I know it's not related, but you may go to : http://cmosedu.com/cmos2/MSD_Matlab/MSD_MATLAB.htm as reference.. Sorry, i can not help you much. --ipyd |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 15th, 2010, 6:13am Mayank wrote on Jun 14th, 2010, 9:13pm:
Mathworks Simulink Agilent Ptolemy Agilent SystemVue Or use Event-Driven Simulators such as Cadence NCSim Synopsys VCS If your interest is a characteristics of whole ΔΣ Fractional-N synthesizer including VCO, use Berkeley Design Automation AFS Transient Noise Analysis. See the followings. http://www.designers-guide.org/Forum/YaBB.pl?num=1238242506 http://www.designers-guide.org/Forum/YaBB.pl?num=1259714206/2#2 |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 16th, 2010, 3:21am I want to obtain Output Spectrum of a first order Δ-Σ modulator with & without dither. If you can refer to the following paper availabe on ieeexplore --- Reduced complexity 1-bit high order digital delta-sigma modulator for low voltage fractional-N synthesis applications By -- B. Bornoosh, A. Afzali-Kusha, R. Dehghani, M. Mehrara, S.M. Atarodi & M. Nourani I am trying to obtain the plot (from the paper ) that i am attaching with this post. How do i get this ? If someone can help pls. |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 16th, 2010, 5:34am Mayank, Does page 45 provide the measurement you are looking for? http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf Best Regards, Sheldon |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 16th, 2010, 5:46am Mayank wrote on Jun 16th, 2010, 3:21am:
http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643 http://www.designers-guide.org/Forum/YaBB.pl?num=1245144421 |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 16th, 2010, 6:17am One should not simply apply an FFT to the output signal of the VCO/FDN to determine L(Δf ) for the PLL. The result would be quite inaccurate because the FFT samples the waveform at evenly spaced points, and so misses the jitter of the transitions. |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 16th, 2010, 6:18am Sorry, See page 44. Best Regards, Sheldon |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 16th, 2010, 6:55am Quote:
And it is not proper in general. If sampling time step is enough small, we can never miss jitter. |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 16th, 2010, 7:14am Pancho, Actually it is not, read the next page, page 45, and will see that an alternate approach is recommended. By saving the periods you can apply the PSD. BTW, the problem is not the simulator time steps, it is the resolution of the FFT. The number of FFT samples required to capture the jitter is extremely high so it is not an efficient tool for this problem. Best Regards, Sheldon |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 16th, 2010, 7:19am sheldon wrote on Jun 16th, 2010, 7:14am:
sheldon wrote on Jun 16th, 2010, 7:14am:
You refered L(Δf) in your append : http://www.designers-guide.org/Forum/YaBB.pl?num=1276575200/6#6 On the other hand, this is an evaluation of Sφ(Δf) based on well-known Spectrum Estimation Technique which is useful for getting small frequency resolution with small number of samples. Here evenly spaced time step samples can be used. http://www.designers-guide.org/Forum/YaBB.pl?num=1242749411 Statements which you refered regarding evaluation of L(Δf) are similar to old day's claim regarding advantage of Shooting Newton of Cadence Spectre compared to HB analysis. Small frequency resolution requires very long capturing time. On the other hand, we have to make time step very small so we can not miss jitter. So if time steps are evenly spaced even for period where jitters are not included, it is not efficient regarding total time points. This is a claim of Fourier Integral Calculation in Cadence Spectre. sheldon wrote on Jun 16th, 2010, 7:14am:
And it is very practical and useful level. I can set RBW(Resolution Band Width) 1Hz in my Real Time Spectrum Analyzer based on FFT with practical sweep time. |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 16th, 2010, 9:19pm Guys Guys Guys, We digress..... I am not interested in Post-Processing of waveforms. I am well aware how to do that either in MATLAB or in Cadence ADE or wotever. I wanted to know how to setup a Test-Bench around my Δ-Σ modulator model in MATLAB to obtain this output spectrum plot. can this be done in MATLAB ? Is this waveform the output of a Fractional PLL in which SDM is applied because SDM just produces output Division factors. How do i obtain a FFT of a signal from that ?? Which signal is this plot indicative of ? @ Sheldon : I am aware of this concept that Cadence quotes in its ANs. & Pancho is right. Page 45 is referring to Sphi, not Lphi calculation. But pls. address my queries above. We will discuss the FFT funda on a simulator forum later. |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 17th, 2010, 1:41am Mayank wrote on Jun 16th, 2010, 9:19pm:
This is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre. And it is not proper in general. If sampling time step is enough small, we can never miss jitter. Mayank wrote on Jun 16th, 2010, 9:19pm:
Mayank wrote on Jun 16th, 2010, 9:19pm:
See Figure-3 of http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643/4#4 But DSM is modeled by MATLAB not Simulink here. I recommd you use Simulink not MATLAB. |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 17th, 2010, 3:03am Quote:
THAT If the sampling time is small enough, even though different than transition points, how can we not miss jitter in FFT ?? It would be helpful, coz i think this point is going unexplained & misunderstood through past few posts. Quote:
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-- Mayank |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 17th, 2010, 3:09am Mayank wrote on Jun 17th, 2010, 3:03am:
So if we use fixed time step solver in signal flow model simulator, we have to set analysis time step lesser than time resolution of jitter. In this case, FFT of many points are invoked. Mathworks Simulink have both continuous and fixed time step solvers. If you use continuous time solver in Mathworks Simulink, you can use Mathworks MATLAB function to evaluate spectrum for data in "Workspace". Mayank wrote on Jun 17th, 2010, 3:03am:
I can't find proper example of typical 3-cascaded-MASH-DSM for Fractional-N Synthesizer now. |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 17th, 2010, 4:14am Quote:
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Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 17th, 2010, 4:17am Mayank wrote on Jun 17th, 2010, 4:14am:
If you use jitter generator for continous time simulator without sepecifying lowest time resolution, we can't know time resolution. |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 17th, 2010, 5:21am Mayank, You might find this paper interesting, it deals with some of the issues with writing PLL models for discrete time simulators. http://www.cppsim.com/Publications/JNL/perrott_dtc02.pdf You might also want to look at cppsim while it is not MATLAB, you find it interesting. It is fast, has libraries to support PLL simulation, high level tools for PLL design, and some useful tutorial examples. Best Regards, Sheldon |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 17th, 2010, 5:50am @ Pancho : Quote:
Will get myself acquainted with the Schrier toolbox. @ Sheldon : Thanks for the link. I have worked on cppsim & sue models. The paper explains decently the PLL modelling. But cppsim is mainly for phase domain modelling of PLL. I was more interested in SDM Design. Thanks anyways. |
Title: Re: Phase Noise of Δ-Σ modulators Post by Ken Kundert on Jun 17th, 2010, 4:59pm Pancho, Your comments about the simulator are only part of the issue. The Fourier transform itself samples the waveforms on a fixed interval. Assuming that the signal is a square wave, any jitter that occurs between the sample points is unobservable by the Fourier transform. Hence, Sheldon's original comment is correct. -Ken |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 17th, 2010, 8:14pm Ken Kundert wrote on Jun 17th, 2010, 4:59pm:
Ken Kundert wrote on Jun 17th, 2010, 4:59pm:
That is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre. If we use fixed time step solver in signal flow model simulator and set analysis time step lesser than time resolution of jitter, we can never miss jitter in FFT. http://www.designers-guide.org/Forum/YaBB.pl?num=1276575200/14#14 |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 17th, 2010, 8:59pm Quote:
Suppose, if the accuracy of discrete time simulator is 1ps, & we upsample the waveform, be it square or sine, at less than 1ps, then i dont think we are missing anything. Since for taking FFT, we are sampling at rate higher than the accuracy of the simulator. I think that's what Pancho meant by Quote:
But, obviously this method requires unnecessary upsampling at such high frequency in the Post-Processing Phase generating large no. of timepoints. If Ken says, Spectre employs a better algo taking only transition timepoints into consideration, then it's worth it. Speaking alongwith the on-going but digressed discussion, Ken, if you say, taking a FFT directly over VCO/FDN to determine phase noise is incorrect, then while doing transient noise simulations on PLLs, when we take DFT of the output clock to obtain phase noise PSD, IS THAT INCORRECT TOO ?? -- Mayank. |
Title: Re: Phase Noise of Δ-Σ modulators Post by Ken Kundert on Jun 18th, 2010, 9:07am If you are using a fixed-time step simulator, you have already greatly limited your ability to represent jitter unless you convert the jitter to a real quantity that is passed on each transition. This is the idea behind Michael Perrott's CppSim and the matlab scrip I used in my PLL jitter paper. Furthermore, if you are using a fixed-time step simulator there is no need to up-sample as no new information is gained. It is best to synchronize the sample rate of the Fourier Transform with the time step of the simulator. -Ken |
Title: Re: Phase Noise of Δ-Σ modulators Post by Ken Kundert on Jun 18th, 2010, 4:09pm Mayank, I never mentioned Spectre or its algorithms. Nor did I say that using a FFT to determine phase noise was incorrect. Rather I am just reiterating the point that Sheldon made, that FFTs sample the waveform and so have limited ability to resolve jitter. I believe Sheldon made an important point, and I believe that point was being lost. -Ken |
Title: Re: Phase Noise of Δ-Σ modulators Post by sheldon on Jun 18th, 2010, 5:43pm Mayank, Please see the following reference, the Fourier Integral is available in MATLAB. http://www.mathworks.se/access/helpdesk/help/toolbox/symbolic/fourier.html Try it and see how if works your application. Best Regards, Sheldon |
Title: Re: Phase Noise of Δ-Σ modulators Post by Mayank on Jun 24th, 2010, 10:23pm Quote:
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Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jun 26th, 2010, 10:27pm Consider actual instruments for evaluation of jitter characteristics. They are based on fixed time step sampling even if edge trigger is used with not only Real-Time-Sampling but also Equivalent-Time-Sampling technique. You know that they are very practical level, if you have experiences of actual measurements. |
Title: Re: Phase Noise of Δ-Σ modulators Post by hyy95 on Jul 1st, 2010, 1:16am In the realworld measurements, lots of averaging is done to bring down the noise floor. In simulation, if the FFT points is not large enough or if you can't do tons of averaging, the quantize noise itself will kill the result. |
Title: Re: Phase Noise of Δ-Σ modulators Post by pancho_hideboo on Jul 1st, 2010, 4:21am hyy95 wrote on Jul 1st, 2010, 1:16am:
The main reason why many period sets are required is to capture many jitters and to increase frequency resolution for low frequency, since it is no more than monte carlo trials. Of course, you can decrease floor level of noise, if you utilize frame averaging of spectrums for short time. |
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