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Design >> Analog Design >> about feedthrough error, need your help
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Message started by lhlbluesky_lhl on Jun 18^th, 2010, 5:45am

Title: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 18^th, 2010, 5:45am

i have designded a circuit as the figure shows, VI is the input signal, when S1 is closed, VI transfers to Va, then to Vb through the buffer, when S2 is closed, the signal transfered to VO. the buffer is as the figure shows also, it is a two stage opamp with miller compensation, the clock period of S2 is 10MHz, the DC gain of the opamp is 86dB, GBW is 72MHz, then, my question is: when CTRL (that is the inverter signal of S2) goes low, the signal Va (Vb, VO also) has a jump of 50mV or so, however, when CTRL is always low (that is, the opamp works all the time), and when S2 is closed (that is, S2 goes high), the jump is very small, less than 0.2mV. why? what is the reason? i want this voltage jump is as small as possible when S2 is closed (that is, CTRL goes low at the same time). how to solve this problem? please help me, thanks all in advance. thanks all.

Title: Re: about feedthrough error, need your help
Post by AnalogDE on Jun 18^th, 2010, 4:12pm

You have coupling coming from the CTRL switch gate onto the input pair gates (Va,Vb). Think about reducing the coupling ratio (increase Va capacitance or reduce the size of CTRL PMOS switches). You can also play around with the CTRL gate ramp time -- slower ramp = less coupling.

You can also try compensating the charge injected -- you'll need a dummy replica input leg/ctrl switch with CTRL gate switching in the opposite direction.

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 19^th, 2010, 7:46am

thanks. can anyone give me some other advice or ideas, please?

Title: Re: about feedthrough error, need your help
Post by wave on Jun 19^th, 2010, 3:37pm

what about putting the power down switches ABOVE the pmos current mirrors?

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 20^th, 2010, 5:37am

hi, wave, what do you mean for 'putting the power down switches ABOVE the pmos current mirrors'? can you speak more clearly?

besides, any other advice? thanks all.

Title: Re: about feedthrough error, need your help
Post by nobody on Jun 20^th, 2010, 5:58am

So the offset is caused by clock feedthrough or not and you verified that already. Like AnalogDE said, you can get less offset by using slow gating or adding a larger cap if the offset is due to clock feedthrough.

Title: Re: about feedthrough error, need your help
Post by AnalogDE on Jun 20^th, 2010, 8:24am

Putting the CTRL switches above the PMOS mirrors (VP gate) gives you less feedthrough. The coupling path is attenuated through the PMOS mirror caps. Be careful with the matching of Vgs betwen PMOS mirror/PMOS diode IREF.

Title: Re: about feedthrough error, need your help
Post by Mayank on Jun 20^th, 2010, 11:03am

Quote:

I had go with wave's first.
If that doesnt provide you with required spec on feedthrough,
try compensating with Opp. transitions & slow ramps.

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 21^st, 2010, 4:46am

thanks all first. now, i have put the CTRL switches above the PMOS mirrors (VP gate), but it improves a little only; besides, i tried the slower ramp also, it improves a little only too. and the cap before the opamp cannot be too large for my circuit spec, so any other advice?

besides, what is the meaning of 'matching of Vgs betwen PMOS mirror/PMOS diode IREF'? please speak more clearly for me, thanks.

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 21^st, 2010, 4:48am

another question: what is the best ratio of W/L for the PMOS mirror and CTRL switch? how to get the relationship between them?

Title: Re: about feedthrough error, need your help
Post by Mayank on Jun 21^st, 2010, 6:33am

Since CTRL is a switching signal, i assume it would be Full-Swing.

Larger the W/L of the Switch, -->
1. lesser the VDS of the switch.
2. more VDS available for current mirrors.
3. lesser is the current noise from current mirrors.
4. More is the area consumed by the switches.
5. More is the Clock Feed-Through.
6. Faster is the switching action.

Depending on 4, 5, & 6 , choose an optimum/tolerable switch size, & assign the rest of the vds to the current mirrors.

Title: Re: about feedthrough error, need your help
Post by vivkr on Jun 22^nd, 2010, 1:38am

There are 2 things you can try.

1. Put the switch on top of the PMOS mirror and make it minimum channel length, and use minimum width that still gets you going. This will still leave some feedforward, notably at the output branch.

OR a better solution

2. Since you are only trying to cutoff the current flowing into the opamp, remove the series switches from the their present location, and instead turn off current supply to the biasing circuit which powers the PMOS mirrors. This should reduce the amount of direct coupling but you will still have some glitch.

Vivek

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 22^nd, 2010, 5:40am

i have put the CTRL switches above the PMOS mirrors (VP gate), and make it as small as possible, but it improves a little only; i don't know why. besides, i'll try to cut off the bias circuit as vivkr said, and see if it works.

can any others give me some useful suggestions?

thanks all.

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 23^rd, 2010, 6:38am

please help me again, i really need your help, everyone. thanks.

Title: Re: about feedthrough error, need your help
Post by lhlbluesky_lhl on Jun 25^th, 2010, 5:33am

can anyone help me again, please?