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Design >> Analog Design >> Analog on-chip averaging circuit
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Message started by turbo on Jul 8^th, 2010, 4:51am

Title: Analog on-chip averaging circuit
Post by turbo on Jul 8^th, 2010, 4:51am

Hi,

I have the following real time situation:

Input signal: A signal with amplitude between 0 and 1V. The signal frequency is 1 (one) Hz.

Plausible solutions:

Objective: to find the average of the input voltage in real time, to be fed to a following Voltage to current converter.

1. Using passive RC low pass filter.: time constant comes out to be around 10 sec and huge values of R (1G ohms) & Capacitor (10nF) are required. So this approach is not very attractive as on-chip integration is not possible though Surface Mounted Resistor/Capacitors can be used.

2. To use a Gm-C filter: but here to have such a large time constant and keeping Capacitor size minimum (let say 100pF) the required transconductance is of the order of few pA/V which seems to be very challenging. Moreover, for operation to be ultra low power this would necessitate a bias current of few pico Amperes, almost in noise domain!

Any other techniques, suggestion, comments....would be greatly appreciated.

Title: Re: Analog on-chip averaging circuit
Post by Alexandar on Jul 8^th, 2010, 4:59am

Digitization and doing the averaging in digital domain?

Title: Re: Analog on-chip averaging circuit
Post by turbo on Jul 8^th, 2010, 5:02am

Well, that is fine but the objective is to do the processing in analog domain. ( This avoids large number of ADC processing cycles, and other advantages for the application in question).

Title: Re: Analog on-chip averaging circuit
Post by buddypoor on Jul 8^th, 2010, 5:06am

One possible solution for large time constants (ultra low cut-off frequencies) is to use switched-capacitor technology.
For example Maxim-IC's MAX291...295 allow cut-off down to 0.1 Hz.

Title: Re: Analog on-chip averaging circuit
Post by turbo on Jul 8^th, 2010, 5:17am

Thanks! But this is an off the shelf component and consumes at least few milli watts of power. Moreover, i have no provision of an external clock to derive the circuit.

Title: Re: Analog on-chip averaging circuit
Post by vivkr on Jul 14^th, 2010, 1:59am

turbo wrote on Jul 8^th, 2010, 4:51am:

Hi,

I have the following real time situation:

Input signal: A signal with amplitude between 0 and 1V. The signal frequency is 1 (one) Hz.

2. To use a Gm-C filter: but here to have such a large time constant and keeping Capacitor size minimum (let say 100pF) the required transconductance is of the order of few pA/V which seems to be very challenging. Moreover, for operation to be ultra low power this would necessitate a bias current of few pico Amperes, almost in noise domain!

A) Cannot agree with you about gmC not being suitable: I have seen gmC filters with reasonable cap sizes and cutoffs in this range. Consider that you can use circuit tricks to reduce the effective gm of your circuit, e.g. if you make a differential pair for a gm stage, then you can cross-couple the outputs to achieve a cancellation and reduction in gm. I think that a factor of 10 reduction on gm ought to be possible.
You wouldn't need pA of bias current, only some 10-100 nA or so which you can achieve with suitable current source types.

There are surely other tricks to lower gm as well. Keep in mind that you use a very small W/L. At lower current levels, you need to fight against slipping into weak inversion as gm/Id of a transistor is maximized when entering into weak inversion.

B) Consider using a series of MOS switches as R for your RC. This also works, provided that the MOS switches are biased weakly. This may however be a bit nonlinear.

Vivek

Title: Re: Analog on-chip averaging circuit
Post by raja.cedt on Jul 14^th, 2010, 6:26am

hi turbo,
as vivkr said why don't you use mos resistors and miller multiplied capacitor (may be if you can use larger gain you may use smaller resistor only instead of using mos resistor.

Thanks,
Rajasekhar.

Title: Re: Analog on-chip averaging circuit
Post by thechopper on Jul 15^th, 2010, 5:35pm

Why not use an analog discrete time approach? : sample the analog signal with a bunch of buffered sample and hold circuits and then do a resistive network with a common output node. Such output node will give you the average of the sampled values.
The more averages (S/Hs) you take the better the averaging (the smaller the cut off frequency of the averaging circuit.

Best
Tosei

Title: Re: Analog on-chip averaging circuit
Post by vivkr on Jul 16^th, 2010, 2:47am

HdrChopper wrote on Jul 15^th, 2010, 5:35pm:

apparently! there's no clock available.

Vivek

Title: Re: Analog on-chip averaging circuit
Post by turbo on Jul 16^th, 2010, 4:57am

Thanks all!

I'm looking into the suggestions by Vivek. Further, any reference for using MOS resistance+miller capacitance multiplication concept?

The other crucial point is the low power nature of the solution, i'm looking for anything of the order of few hundred nanowatts of power consumption.

Recently, i came across work of Dr Alfredo Arnaud on very large time constant circuits. ( http://die.ucu.edu.uy/users/aarnaud/aarnaud_archivos/page0001.htm)

I'm still looking into all possibilities and would be discussing further in the days to come.

PS: Using Sample & Hold approach is not considered since:
1. No clock signal is available (that would demand another oscillator otherwise)
2. With resistive network space/matching will be an issue
3. The whole idea of doing analog averaging is to avoid ADC procedure...

Please correct me if i'm wrong!

Title: Re: Analog on-chip averaging circuit
Post by loose-electron on Jul 17^th, 2010, 1:54pm

Usong a LPF with a sampled time input to artificially increase the time constant works pretty well here.

Create a V to I converter, feed the resulting I into an integrating capacitor thru a switching circuit.

Duty cycle the switching circuit to 1/100 and the capacitor size drops by 100 for the same time constant (BW)

No clock? build an oscillator, the frequency is not critical, just the duty cycle ratio (digitally set)